Associative Mapping
• Each block mapped to any cache location
• Each memory block is mapped to exactly one block in the cache
• Each block mapped to subset of cache locations
Direct Mapping
Set-Associative Mapping
• Structural hazards
different instructions in different stages (or the same stage) conflicting for the same resource
an instruction cannot continue because it needs a value that has not yet been generated by an earlier instruction
fetch cannot continue because it does not know the outcome of an earlier branch – special case of a data hazard
• Data hazards
• Control hazards
• Compulsory misses
The very first access to a block cannot be in the cache
Occurs if the cache cannot contain all the blocks needed during execution of a program
Occurs if the block placement strategy is not fully associative
• Capacity misses
• Conflict misses
4) Choose the feature(s) of first generation computer architecture
• Vacuum tubes, Assembly language
• Multilevel Caches
• Avoiding Address Translation during Cache Indexing
5) A common measure of performance for a processor is the rate at which instructions are executed, called
• CPI
• Clock Rate
• MFLOPS
• MIPS
6) A technique used in advanced microprocessors where the microprocessor begins executing a first instruction before the second has been completed is called pipelining
7) Choose the features of third generation computer architecture
• Object-Oriented Programming
• Graphics
• Timesharing
• Floating point arithmetic
• Use of cache memory
8) Choose advanced cache optimizations
• Giving Reads Priority over Writes
• Larger Cache Size
• Hardware Prefetching of Instructions and Data
• Merging Write Buffer
• Critical Word First and Early Restart
9) Choose basic cache optimizations
• Compiler-Controlled Prefetching
• Nonblocking Caches
• Small and Simple First-Level Caches
10) Choose data dependences
• Read-After-Read
• Read-After-Write
• Write-After-Write
• Write-After-Read
11) Choose hazard for the following definition: an instruction cannot continue because it needs a value that has not yet been generated by an earlier instruction
• Data
• Structural
• Control
12) Choose hazard for the following definition: different instructions in different stages (or the same stage) conflicting for the same resource
o Structural
o Data
o Control
13) Choose hazard for the following definition: fetch cannot continue because it does not know the outcome of an earlier branch - special case of a data hazard
14) Choose the access method(s)
o Parallel Access
o Indirect Access
o Random Access
o Direct Access
o Sequential Access
15) Choose the component of SSD for the following definition: High speed RAM memory components used for speed matching and to increased data throughput
o Data buffer/cache
o Flash Memory Components
o Addressing
o Controller
o Error Correction
16) Choose the component of SSD for the following definition: Individual NAND flash chips
17) Choose the component of SSD for the following definition: Logic for error detection and correction
o Flash memory components
18) Choose the component of SSD for the following definition: Logic that performs the selection function across the flash memory components
19) Choose the component of SSD for the following definition: provides SSD device level interfacing and firmware execution
o Error correction
20) Choose the components of SSD
o Data size
o Memory hierarchy
21) Choose the definition for capacity misses
o Occurs if the cache cannot contain all the blocks needed during execution of a program
o The very first access to a block cannot be in the cache
o Occurs if the block placement strategy is not fully associative
22) Choose the definition for compulsory misses
23) Choose the definition for conflict misses
24) Choose the element(s) of cache design
o Tag
o Latency
o AMAT
o Mapping Function
o Replacement Algorithm
o Number of Caches
25) Choose the element(s) of cache design
o Cache Size
o Line Size
26) Choose the feature(s) of first generation computer architecture
o Magnetic core memory
o Semiconductor memory
o Machine code
o Assembly language
o Vacuum tubes
27) Choose the feature(s) of fourth generation computer architecture
o Object-Oriented programming
o Wide spread use of data communications
o Smallest in size
o Use of cache memory
o Use of drum memory or magnetic core memory
28) Choose the feature(s) of second generation computer architecture
o High level languages
o Transistors
o 2 Kb memory, 10 KIPS
o 2 Mb memory, 5 MIPS
o Different types of supported instructions
29) Choose the feature(s) of third generation computer architecture
o Floating point arithmetic
o Timesharing
o Graphics
30) Choose the key characteristics of computer memory systems
o Location
o Unit of Transfer
o Access Method
o Stalling
o Hazards
31) Choose the key characteristics of computer memory systems
o Capacity
o Performance
o Organization
o Instruction Fetch
o Instruction Decode
32) Choose the key characteristics of computer memory systems
o %20% Physical Type
o %20% Physical Characteristics
o %20% Access Method
o %20% Unit of Transfer
o %20% Performance
33) Choose the performance factor
o Instruction Count
o Number of Processor Cycles
o Number of memory references
34) Choose the performance factor(s)
36) Choose the physical characteristic(s) of disk systems
o Disk system implementstion
o Disk Size
o Head Mechanism
o Head Motion
o Disk Portability
37) Choose the right formula for AMAT
o AMAT \= Hit time + Miss rate + Miss penalty
o AMAT \= Hit time * Miss rate + Miss penalty
o AMAT \= Hit time * Miss rate * Miss penalty
o AMAT \= Hit time + Miss rate * Miss penalty
38) Choose the system attribute(s) by which the performance factors are influenced
o Cache size
o Compiler Technology
o Processor Implementation
o Cache and memory hierarchy
39) Choose the type(s) of auxiliary memory
o Flash Memory
o Optical Disk
o Hard Drive
o SSD
o RAM
40) Choose the years of the first generation computer architecture
o 1958-1964
o 1964-1974
o 1974-present
o 1945-1964
o 1945-1958
41) Choose the years of the second generation computer architecture
42) Choose two types of models for a computing machine
o Harvard architecture
o Von Neumann architecture
o Oxford architecture
o Stanford architecture
43) CPU Time \= I * CPI / R. Which parameter requires special profiling software?
o Cycles Per instruction
o Execution time
o Clock Rate
o Numbers of instructions
44) Floating point performance is expressed as
o CPI
o FLOPS
o MIPS
o MFLOPS
45) For random-access memory, the time it takes to perform a read or write operation is called
o Access Time
Four bits make octal digit
47) Halting the flow of instructions until the required result is ready to be used is called
o waiting
o delaying
o halting
o stalling
48) How a binary digit is called?
o byte
o digit
o kilobyte
o bit
49) How a memory unit accessed by contents is called?
o Associative Memory
o Content Addressable Memory
o Auxiliary Memory
o Cache Memory
o Virtual Memory
50) How external nonvolatile memory is called?
o Secondary memory
o Main memory
o Cache memory
o Virtual memory
51) How many access methods are there?
3
2
4
5
6
52) how many elements of cache design are there?
7
53) How many generations of computer architecture are there?
54) How many number systems are there?
1
55) How many performance factors are there
56) How many physical characteristics of disk systems are there?
57) How the stage in which the results of the operation are written to the destination register is called?
o Write Back
o Execution
o Memory read/write
58) IBM System/360 Model 91 was introduced in 1966
59) In 1976 Apple II computer model was released
60) In execution stage identification of the operation is performed
61) In LRU replacement algorithm, the block that is in the cache longest is replaced
62) In virtual memory, memory can be used efficiently because a section of program always loaded
63) In which cache memory mapping technique any block from main memory can be placed anywhere in the cache?
o Associative Mapping
o Set Associative Mapping
o Direct Mapping
64) In which cache memory mapping technique any memory block is mapped to exactly one block in the cache?
65) In which cache memory mapping technique any memory block mapped to subset of cache locations?
66) Into how many parts a program (or algorithm) which can be parallelized can be split up?
67) Select cache optimizations to reduce miss penalty
o Multilevel Caches
o Giving Reads Priority over Writes
o Higher associativity
o Way Prediction
68) Select cache optimizations to increase the Cache Bandwidth
o Nonblocking Caches
o Multibanked Caches
o Pipelined Cache Access
o Small and Simple First-Level Caches
69) Octal and hexadecimal numbers are hard on use and conversion
70) Physical address used by program, and which OS must translate into virtual address
Pipelining can only be implemented on hardware
Process of instruction execution is divided into two or more steps, called
o pipelining
o pipe stages
o pipe segments
o instruction execution
o pipeline hazard
73) ROM is the place in a computer where the operating system, application programs, and data in current use are kept.
74) Choose the features of first generation computer architecture
75) How a memory unit accessed by contents is called?
76) Choose the access methods
77) Which type of memory accessed via the input/output channels?
o Secondary Memoory
o Main Memory
78) Which type of memory stores frequently used data?
o Secondary Memory
79) Stage in which the instruction is fetched from memory and placed in the instruction register called
80) Which stage is responsible for storing and loading values to and from memory?
81) How the stage in which the results of the operation are written to the destination register is called?
82) Select cache optimizations to reduce hit time (both basic and advanced)
o Avoiding Address Translation during Cache Indexing
o Compiler Optimizations
o Compiler-Controlled Prefetching
83) Select the correct interpretation(s) of Amdahl's Law
o is used to compare computers' performance
o is used calculate the execution time of a program
o is used to find the maximum expected improvement
o it means that it is the algorithm that decides the speedup not the number of processors
84) SSD is over 10 times faster than the spinning disks in HDD
85) SSD stands for :
• Solid State Drive
• Saved State Drive
• Solid Slash Drive
• Soska State Drive
86) SSDs are more susceptible to physical shock and vibration
87) SSDs are susceptible to mechanical wear :
88) Static RAM has a reduced power consumption, and a large storage capacity :
89) The "natural" unit of organization of memory is called block :
90) The advantage of virtual memory is that it takes less time to switch between applications because of additional memory :
91) The basic element of a semiconductor memory is the memory cell :
92) The execution time of a program clearly depends on the number of instructions :
he more clock rate of processor, the faster is processor :
94) The particular block is currently being stored is called tag :
95) The RAID scheme consists of 7 levels :
96) The rate at which data can be transferred into or out of a memory unit is called :
• Transfer Rate
• Speed Rate
• Popularity Rate
97) The time interval is called a clock rate
98) There are three types of cache addresses :
99) There are two types of mapping functions :
100) Three bits make hexadecimal digit :
101) We can find needed block in associatively mapped cache by its block address :
102) What does CPI stand for:
• Cycles Per Instruction
• Circles Per Instruction
• Cycles Per Intersection
• Curcuits Per Instruction
103) What does LRU stand for? :
• Least Recently Used
• Least Rarely Used
• Least Recently Unified
• Less Recently Used
104) What does RAID stand for?:
• Redundant Array of Independent Disks
• Reduced Array of Independent Disks
• Redundant Array of Independent Dots
• Restructered Array of Independent Disks
105) What is included into performance characteristic of computer memory systems? :
Access time
Cycle Time
Transfer Rate
Speed rate
106) What is included into physical type characteristic of computer memory systems? :
• Semiconductor
• Magnetic
• Laser
• Tapes
107) What is time elapsed to program execution? :
• CPU Time + I/O waiting
• Other programs
• Cycle Time
• Access time
108) Which digits are used in octal number system? :
0-7
0-8
1-8
1-7
109) Which stage is responsible for storing and loading values to and from memory?
• Memory read/write
• Write back
• Memory update
• Memory allocation
110) Which type of memory accessed via the input/output channels :
• Auxiliary Memory
• Secondary Memory
• Virtual memory
• Cache memory
111) Which type of memory stores frequently used data :
• Cache Memory
• Virtual Memory
• Axuilary Memory
112) Word is the "natural" unit of organization of memory :
113) Halting the flow of instructions until the required result is ready to be used is called :
• stalling
• hailing
• falling
• feeling
114) In virtual memory, memory can be used efficiently because a section of program always loaded :
115) Choose the key characteristics of computer memory systems
Physical Type
Physical Characteristics
Access Method
Unit of Transfer
Performance
None of them
