CMOS Inverter switching characteristics

To define Rise Time and Fall Time of CMOS Inverter. Rise Time is time delay from 90% 10% 50%( 90%, 10%, 50% ) of the output voltage to 10% 50% 90%( 10%, 50%, 90% ) of the output voltage; Fall Time is time delay from 10% 50% 90%( 10%, 50%, 90% ) of the output voltage to 90% 50% 10%( 90%, 50%, 10% ) of the output voltage.

To define the propagation delay time of CMOS Inverter. Propagation Delay from High to Low is time delay from V(OH) to 50% 90% 10%( 50%, 90%, 10% ) of the output voltage; Propagation Delay from Low to High is time delay from V(OL) to 50% 10% 90%( 50%, 10%, 90% ) of the output voltage.