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Chapter 2: MCU Archi and Embed C
- Von Neumann Architecture
- Stored program computer
- Stores program data and instructions data in the same memory (RAM)
- CPU / Processor: Central Processing Unit
- Memory: Stores data and program
- I/O / Peripherals: For CPU to interface to external world.
- Address bus: Determine which location
- Data Bus: Determine the data size
- Control Bus: Determine the type of instruction (read / write)
- Stored program computer
- I/O and Interfacing with Externals
- Connection
- Loosely Coupled: For external interface
- via external bus
- via network
- via port
- via external bus
- Tightly Coupled: For internal interface
- via fast internal bus
- via fast internal bus
- Loosely Coupled: For external interface
- Data Transfer
- Serial
- Transmit data bit by bit
- Requires at least 2 wires to support bidirectional communcation
- Low speed but is the standard for external interface
- Transmit data bit by bit
- Parallel
- Transmit data multiple bits at a time
- Require multiple interconnections and additional synchronization mechanism
- Fast but limited to short distance, mostly used for internal interfacing
- Transmit data multiple bits at a time
- Serial
- OS
- Multitasking: Perform more than one task
- Multithreading: Different parts of same program executed simultaneously
- Multiprocessing: Work appears to be simultaneous because of speed of proceesor
- CPU Speed: Measure of number of instructions CPU can carry out per second
- 2.5GHz CPU: 2.5 billion cycles / second
- 2.5GHz CPU: 2.5 billion cycles / second
- Multitasking: Perform more than one task
- Connection
- Microcontroller Selection
- Key Selection Criteria
- CPU computation requirements
- Number of I/O available
- Support in terms of tools and software libraries availability
- Cost
- MCU Manufacturer
- Power Consumption
- CPU computation requirements
- Memory Options
- Types: Masked, EEPROM, Flash, RAM, FRAM
- Size: Can have a wide range
- Types: Masked, EEPROM, Flash, RAM, FRAM
- Internal Peripherals
- Key Selection Criteria
- MSP430
- CPU Block Diagram
- PC: Address of next instruction to be executed
- SP (20 bit): Points to RAM reserve to store program context so that it can return after subroutine / interrupt processing.
- SR: Contains a set of flags (C, Z, N, V), GIE and MCU mode selection bits
- Constant Generator: 6 most frequently used values
- General purpose registers: 12
- PC: Address of next instruction to be executed
- Key Features
- Ultra Low Power
- Increased Performance
- Innovative Features
- 16-bit RISC computer based on Von Neumann architecture
- Ultra Low Power
- Memory: Sequential list of addressable storage elements
- Program / Instruction: A sequence of instructions
- Not possible to differentiate instruction and data
- Data: Values instructions operate on
- Program / Instruction: A sequence of instructions
- CPU Block Diagram
- Embedded C
- Identifiers
- const: Constant; stored in program section memory
- extern: To make reference to variables declared elsewhere
- static: Preserves the variable even after function/block
- volatile: To allow changes of variable by an event outside program i.e. ADC
- const: Constant; stored in program section memory
- Directives
- include: to include a file as part of source code
- define: substitute a name by corresponding expression
- pragma: compiler specific directive; instructs compiler to use implementation dependent features
- include: to include a file as part of source code
- Identifiers
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