Zhandos Ainabek
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Quiz on CSA (115) ⊙ IITU 2017, created by Zhandos Ainabek on 20/12/2017.

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Created by Zhandos Ainabek almost 7 years ago
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CSA (115) ⊙ IITU 2017

CSA (115) ⊙ IITU 2017

Question 1 of 121

1

Associative Mapping

Select one of the following:

  • • Each block mapped to any cache location

  • • Each memory block is mapped to exactly one block in the cache

  • • Each block mapped to subset of cache locations

Explanation

Question 2 of 121

1

Direct Mapping

Select one of the following:

  • • Each block mapped to any cache location

  • • Each memory block is mapped to exactly one block in the cache

  • • Each block mapped to subset of cache locations

Explanation

Question 3 of 121

1

Set-Associative Mapping

Select one of the following:

  • • Each block mapped to any cache location

  • • Each memory block is mapped to exactly one block in the cache

  • • Each block mapped to subset of cache locations

Explanation

Question 4 of 121

1

• Structural hazards

Select one of the following:

  • different instructions in different stages (or the same stage) conflicting for the same resource

  • an instruction cannot continue because it needs a value that has not yet been generated by an earlier instruction

  • fetch cannot continue because it does not know the outcome of an earlier branch – special case of a data hazard

Explanation

Question 5 of 121

1

• Data hazards

Select one of the following:

  • different instructions in different stages (or the same stage) conflicting for the same resource

  • an instruction cannot continue because it needs a value that has not yet been generated by an earlier instruction

  • fetch cannot continue because it does not know the outcome of an earlier branch – special case of a data hazard

Explanation

Question 6 of 121

1

• Control hazards

Select one of the following:

  • different instructions in different stages (or the same stage) conflicting for the same resource

  • an instruction cannot continue because it needs a value that has not yet been generated by an earlier instruction

  • fetch cannot continue because it does not know the outcome of an earlier branch – special case of a data hazard

Explanation

Question 7 of 121

1

• Compulsory misses

Select one of the following:

  • The very first access to a block cannot be in the cache

  • Occurs if the cache cannot contain all the blocks needed during execution of a program

  • Occurs if the block placement strategy is not fully associative

Explanation

Question 8 of 121

1

• Capacity misses

Select one of the following:

  • The very first access to a block cannot be in the cache

  • Occurs if the cache cannot contain all the blocks needed during execution of a program

  • Occurs if the block placement strategy is not fully associative

Explanation

Question 9 of 121

1

• Conflict misses

Select one of the following:

  • The very first access to a block cannot be in the cache

  • Occurs if the cache cannot contain all the blocks needed during execution of a program

  • Occurs if the block placement strategy is not fully associative

Explanation

Question 10 of 121

1

4) Choose the feature(s) of first generation computer architecture

Select one of the following:

  • • Vacuum tubes, Assembly language

  • • Multilevel Caches

  • • Avoiding Address Translation during Cache Indexing

Explanation

Question 11 of 121

1

5) A common measure of performance for a processor is the rate at which instructions are executed, called

Select one of the following:

  • • CPI

  • • Clock Rate

  • • MFLOPS

  • • MIPS

Explanation

Question 12 of 121

1

6) A technique used in advanced microprocessors where the microprocessor begins executing a first instruction before the second has been completed is called pipelining

Select one of the following:

  • True
  • False

Explanation

Question 13 of 121

1

7) Choose the features of third generation computer architecture

Select one or more of the following:

  • • Object-Oriented Programming

  • • Graphics

  • • Timesharing

  • • Floating point arithmetic

  • • Use of cache memory

Explanation

Question 14 of 121

1

8) Choose advanced cache optimizations

Select one or more of the following:

  • • Giving Reads Priority over Writes

  • • Larger Cache Size

  • • Hardware Prefetching of Instructions and Data

  • • Merging Write Buffer

  • • Critical Word First and Early Restart

Explanation

Question 15 of 121

1

9) Choose basic cache optimizations

Select one or more of the following:

  • • Compiler-Controlled Prefetching

  • • Nonblocking Caches

  • • Small and Simple First-Level Caches

  • • Multilevel Caches

  • • Avoiding Address Translation during Cache Indexing

Explanation

Question 16 of 121

1

10) Choose data dependences

Select one or more of the following:

  • • Read-After-Read

  • • Read-After-Write

  • • Write-After-Write

  • • Write-After-Read

Explanation

Question 17 of 121

1

11) Choose hazard for the following definition: an instruction cannot continue because it needs a value that has not yet been generated by an earlier instruction

Select one of the following:

  • • Data

  • • Structural

  • • Control

Explanation

Question 18 of 121

1

12) Choose hazard for the following definition: different instructions in different stages (or the same stage) conflicting for the same resource

Select one of the following:

  • o Structural

  • o Data

  • o Control

Explanation

Question 19 of 121

1

13) Choose hazard for the following definition: fetch cannot continue because it does not know the outcome of an earlier branch - special case of a data hazard

Select one of the following:

  • o Control

  • o Structural

  • o Data

Explanation

Question 20 of 121

1

14) Choose the access method(s)

Select one or more of the following:

  • o Parallel Access

  • o Indirect Access

  • o Random Access

  • o Direct Access

  • o Sequential Access

Explanation

Question 21 of 121

1

15) Choose the component of SSD for the following definition: High speed RAM memory components used for speed matching and to increased data throughput

Select one of the following:

  • o Data buffer/cache

  • o Flash Memory Components

  • o Addressing

  • o Controller

  • o Error Correction

Explanation

Question 22 of 121

1

16) Choose the component of SSD for the following definition: Individual NAND flash chips

Select one of the following:

  • o Flash Memory Components

  • o Addressing

  • o Data buffer/cache

  • o Controller

  • o Error Correction

Explanation

Question 23 of 121

1

17) Choose the component of SSD for the following definition: Logic for error detection and correction

Select one of the following:

  • o Error Correction

  • o Addressing

  • o Data buffer/cache

  • o Controller

  • o Flash memory components

Explanation

Question 24 of 121

1

18) Choose the component of SSD for the following definition: Logic that performs the selection function across the flash memory components

Select one of the following:

  • o Addressing

  • o Flash Memory Components

  • o Data buffer/cache

  • o Controller

  • o Error Correction

Explanation

Question 25 of 121

1

19) Choose the component of SSD for the following definition: provides SSD device level interfacing and firmware execution

Select one of the following:

  • o Controller

  • o Addressing

  • o Data buffer/cache

  • o Error correction

  • o Flash memory components

Explanation

Question 26 of 121

1

20) Choose the components of SSD

Select one or more of the following:

  • o Controller

  • o Addressing

  • o Data buffer/cache

  • o Data size

  • o Memory hierarchy

Explanation

Question 27 of 121

1

21) Choose the definition for capacity misses

Select one of the following:

  • o Occurs if the cache cannot contain all the blocks needed during execution of a program

  • o The very first access to a block cannot be in the cache

  • o Occurs if the block placement strategy is not fully associative

Explanation

Question 28 of 121

1

22) Choose the definition for compulsory misses

Select one of the following:

  • o Occurs if the cache cannot contain all the blocks needed during execution of a program

  • o Occurs if the block placement strategy is not fully associative

  • o The very first access to a block cannot be in the cache

Explanation

Question 29 of 121

1

23) Choose the definition for conflict misses

Select one of the following:

  • o Occurs if the block placement strategy is not fully associative

  • o Occurs if the cache cannot contain all the blocks needed during execution of a program

  • o The very first access to a block cannot be in the cache

Explanation

Question 30 of 121

1

24) Choose the element(s) of cache design

Select one or more of the following:

  • o Tag

  • o Latency

  • o AMAT

  • o Mapping Function

  • o Replacement Algorithm

  • o Number of Caches

Explanation

Question 31 of 121

1

25) Choose the element(s) of cache design

Select one or more of the following:

  • o Tag

  • o AMAT

  • o Latency

  • o Cache Size

  • o Line Size

  • o Number of Caches

Explanation

Question 32 of 121

1

26) Choose the feature(s) of first generation computer architecture

Select one or more of the following:

  • o Magnetic core memory

  • o Semiconductor memory

  • o Machine code

  • o Assembly language

  • o Vacuum tubes

Explanation

Question 33 of 121

1

27) Choose the feature(s) of fourth generation computer architecture

Select one or more of the following:

  • o Object-Oriented programming

  • o Wide spread use of data communications

  • o Smallest in size

  • o Use of cache memory

  • o Use of drum memory or magnetic core memory

Explanation

Question 34 of 121

1

28) Choose the feature(s) of second generation computer architecture

Select one or more of the following:

  • o High level languages

  • o Transistors

  • o 2 Kb memory, 10 KIPS

  • o 2 Mb memory, 5 MIPS

  • o Different types of supported instructions

Explanation

Question 35 of 121

1

29) Choose the feature(s) of third generation computer architecture

Select one or more of the following:

  • o Object-Oriented programming

  • o Floating point arithmetic

  • o Timesharing

  • o Use of cache memory

  • o Graphics

Explanation

Question 36 of 121

1

30) Choose the key characteristics of computer memory systems

Select one or more of the following:

  • o Location

  • o Unit of Transfer

  • o Access Method

  • o Stalling

  • o Hazards

Explanation

Question 37 of 121

1

31) Choose the key characteristics of computer memory systems

Select one or more of the following:

  • o Capacity

  • o Performance

  • o Organization

  • o Instruction Fetch

  • o Instruction Decode

Explanation

Question 38 of 121

1

32) Choose the key characteristics of computer memory systems

Select one or more of the following:

  • o %20% Physical Type

  • o %20% Physical Characteristics

  • o %20% Access Method

  • o %20% Unit of Transfer

  • o %20% Performance

Explanation

Question 39 of 121

1

33) Choose the performance factor

Select one or more of the following:

  • o Cache Size

  • o Line Size

  • o Instruction Count

  • o Number of Processor Cycles

  • o Number of memory references

Explanation

Question 40 of 121

1

34) Choose the performance factor(s)

Select one or more of the following:

  • o Cache Size

  • o Line Size

  • o Instruction Count

  • o Number of Processor Cycles

  • o Number of memory references

Explanation

Question 41 of 121

1

36) Choose the physical characteristic(s) of disk systems

Select one or more of the following:

  • o Disk system implementstion

  • o Disk Size

  • o Head Mechanism

  • o Head Motion

  • o Disk Portability

Explanation

Question 42 of 121

1

36) Choose the physical characteristic(s) of disk systems

Select one or more of the following:

  • o Disk system implementstion

  • o Disk Size

  • o Head Mechanism

  • o Head Motion

  • o Disk Portability

Explanation

Question 43 of 121

1

37) Choose the right formula for AMAT

Select one of the following:

  • o AMAT \= Hit time + Miss rate + Miss penalty

  • o AMAT \= Hit time * Miss rate + Miss penalty

  • o AMAT \= Hit time * Miss rate * Miss penalty

  • o AMAT \= Hit time + Miss rate * Miss penalty

Explanation

Question 44 of 121

1

38) Choose the system attribute(s) by which the performance factors are influenced

Select one or more of the following:

  • o Cache size

  • o Unit of Transfer

  • o Compiler Technology

  • o Processor Implementation

  • o Cache and memory hierarchy

Explanation

Question 45 of 121

1

39) Choose the type(s) of auxiliary memory

Select one or more of the following:

  • o Flash Memory

  • o Optical Disk

  • o Hard Drive

  • o SSD

  • o RAM

Explanation

Question 46 of 121

1

40) Choose the years of the first generation computer architecture

Select one of the following:

  • o 1958-1964

  • o 1964-1974

  • o 1974-present

  • o 1945-1964

  • o 1945-1958

Explanation

Question 47 of 121

1

41) Choose the years of the second generation computer architecture

Select one of the following:

  • o 1945-1958

  • o 1964-1974

  • o 1974-present

  • o 1945-1964

  • o 1958-1964

Explanation

Question 48 of 121

1

42) Choose two types of models for a computing machine

Select one or more of the following:

  • o Harvard architecture

  • o Von Neumann architecture

  • o Oxford architecture

  • o Stanford architecture

Explanation

Question 49 of 121

1

43) CPU Time \= I * CPI / R. Which parameter requires special profiling software?

Select one of the following:

  • o Cycles Per instruction

  • o Execution time

  • o Clock Rate

  • o Numbers of instructions

Explanation

Question 50 of 121

1

44) Floating point performance is expressed as

Select one of the following:

  • o CPI

  • o FLOPS

  • o MIPS

  • o MFLOPS

Explanation

Question 51 of 121

1

45) For random-access memory, the time it takes to perform a read or write operation is called

Select one or more of the following:

  • o Clock Rate

  • o CPI

  • o Access Time

  • o Latency

Explanation

Question 52 of 121

1

Four bits make octal digit

Select one of the following:

  • True
  • False

Explanation

Question 53 of 121

1

47) Halting the flow of instructions until the required result is ready to be used is called

Select one of the following:

  • o waiting

  • o delaying

  • o halting

  • o stalling

Explanation

Question 54 of 121

1

48) How a binary digit is called?

Select one of the following:

  • o byte

  • o digit

  • o kilobyte

  • o bit

Explanation

Question 55 of 121

1

49) How a memory unit accessed by contents is called?

Select one or more of the following:

  • o Associative Memory

  • o Content Addressable Memory

  • o Auxiliary Memory

  • o Cache Memory

  • o Virtual Memory

Explanation

Question 56 of 121

1

50) How external nonvolatile memory is called?

Select one of the following:

  • o Secondary memory

  • o Main memory

  • o Cache memory

  • o Virtual memory

Explanation

Question 57 of 121

1

51) How many access methods are there?

Select one of the following:

  • 3

  • 2

  • 4

  • 5

  • 6

Explanation

Question 58 of 121

1

52) how many elements of cache design are there?

Select one of the following:

  • 2

  • 4

  • 6

  • 7

Explanation

Question 59 of 121

1

53) How many generations of computer architecture are there?

Select one of the following:

  • 4

  • 5

  • 6

  • 7

Explanation

Question 60 of 121

1

54) How many number systems are there?

Select one of the following:

  • 1

  • 2

  • 3

  • 4

Explanation

Question 61 of 121

1

55) How many performance factors are there

Select one of the following:

  • 5

  • 6

  • 4

  • 3

Explanation

Question 62 of 121

1

56) How many physical characteristics of disk systems are there?

Select one of the following:

  • 4

  • 5

  • 6

  • 7

Explanation

Question 63 of 121

1

57) How the stage in which the results of the operation are written to the destination register is called?

Select one of the following:

  • o Instruction Fetch

  • o Write Back

  • o Instruction Decode

  • o Execution

  • o Memory read/write

Explanation

Question 64 of 121

1

58) IBM System/360 Model 91 was introduced in 1966

Select one of the following:

  • True
  • False

Explanation

Question 65 of 121

1

59) In 1976 Apple II computer model was released

Select one of the following:

  • True
  • False

Explanation

Question 66 of 121

1

60) In execution stage identification of the operation is performed

Select one of the following:

  • True
  • False

Explanation

Question 67 of 121

1

61) In LRU replacement algorithm, the block that is in the cache longest is replaced

Select one of the following:

  • True
  • False

Explanation

Question 68 of 121

1

62) In virtual memory, memory can be used efficiently because a section of program always loaded

Select one of the following:

  • True
  • False

Explanation

Question 69 of 121

1

63) In which cache memory mapping technique any block from main memory can be placed anywhere in the cache?

Select one of the following:

  • o Associative Mapping

  • o Set Associative Mapping

  • o Direct Mapping

Explanation

Question 70 of 121

1

64) In which cache memory mapping technique any memory block is mapped to exactly one block in the cache?

Select one of the following:

  • o Direct Mapping

  • o Set Associative Mapping

  • o Associative Mapping

Explanation

Question 71 of 121

1

65) In which cache memory mapping technique any memory block mapped to subset of cache locations?

Select one of the following:

  • o Set Associative Mapping

  • o Direct Mapping

  • o Associative Mapping

Explanation

Question 72 of 121

1

66) Into how many parts a program (or algorithm) which can be parallelized can be split up?

Select one of the following:

  • 2

  • 3

  • 4

  • 5

Explanation

Question 73 of 121

1

67) Select cache optimizations to reduce miss penalty

Select one or more of the following:

  • o Multilevel Caches

  • o Giving Reads Priority over Writes

  • o Higher associativity

  • o Way Prediction

Explanation

Question 74 of 121

1

68) Select cache optimizations to increase the Cache Bandwidth

Select one or more of the following:

  • o Nonblocking Caches

  • o Multibanked Caches

  • o Pipelined Cache Access

  • o Small and Simple First-Level Caches

  • o Multilevel Caches

Explanation

Question 75 of 121

1

69) Octal and hexadecimal numbers are hard on use and conversion

Select one of the following:

  • True
  • False

Explanation

Question 76 of 121

1

70) Physical address used by program, and which OS must translate into virtual address

Select one of the following:

  • True
  • False

Explanation

Question 77 of 121

1

Pipelining can only be implemented on hardware

Select one of the following:

  • True
  • False

Explanation

Question 78 of 121

1

Process of instruction execution is divided into two or more steps, called

Select one or more of the following:

  • o pipelining

  • o pipe stages

  • o pipe segments

  • o instruction execution

  • o pipeline hazard

Explanation

Question 79 of 121

1

73) ROM is the place in a computer where the operating system, application programs, and data in current use are kept.

Select one of the following:

  • True
  • False

Explanation

Question 80 of 121

1

74) Choose the features of first generation computer architecture

Select one or more of the following:

  • o Vacuum tubes

  • o Assembly language

  • o Magnetic core memory

  • o Semiconductor memory

  • o Machine code

Explanation

Question 81 of 121

1

75) How a memory unit accessed by contents is called?

Select one or more of the following:

  • o Associative Memory

  • o Content Addressable Memory

  • o Auxiliary Memory

  • o Cache Memory

  • o Virtual Memory

Explanation

Question 82 of 121

1

76) Choose the access methods

Select one or more of the following:

  • o Random Access

  • o Parallel Access

  • o Sequential Access

  • o Indirect Access

  • o Direct Access

Explanation

Question 83 of 121

1

77) Which type of memory accessed via the input/output channels?

Select one or more of the following:

  • o Auxiliary Memory

  • o Secondary Memoory

  • o Main Memory

  • o Cache Memory

  • o Virtual Memory

Explanation

Question 84 of 121

1

78) Which type of memory stores frequently used data?

Select one of the following:

  • o Cache Memory

  • o Auxiliary Memory

  • o Main Memory

  • o Virtual Memory

  • o Secondary Memory

Explanation

Question 85 of 121

1

79) Stage in which the instruction is fetched from memory and placed in the instruction register called

Select one of the following:

  • o Instruction Fetch

  • o Instruction Decode

  • o Memory read/write

  • o Execution

  • o Write Back

Explanation

Question 86 of 121

1

80) Which stage is responsible for storing and loading values to and from memory?

Select one of the following:

  • o Instruction Fetch

  • o Instruction Decode

  • o Execution

  • o Memory read/write

  • o Write Back

Explanation

Question 87 of 121

1

81) How the stage in which the results of the operation are written to the destination register is called?

Select one of the following:

  • o Instruction Fetch

  • o Instruction Decode

  • o Execution

  • o Memory read/write

  • o Write Back

Explanation

Question 88 of 121

1

82) Select cache optimizations to reduce hit time (both basic and advanced)

Select one or more of the following:

  • o Avoiding Address Translation during Cache Indexing

  • o Small and Simple First-Level Caches

  • o Way Prediction

  • o Compiler Optimizations

  • o Compiler-Controlled Prefetching

Explanation

Question 89 of 121

1

83) Select the correct interpretation(s) of Amdahl's Law

Select one or more of the following:

  • o is used to compare computers' performance

  • o is used calculate the execution time of a program

  • o is used to find the maximum expected improvement

  • o it means that it is the algorithm that decides the speedup not the number of processors

Explanation

Question 90 of 121

1

84) SSD is over 10 times faster than the spinning disks in HDD

Select one of the following:

  • True
  • False

Explanation

Question 91 of 121

1

85) SSD stands for :

Select one of the following:

  • • Solid State Drive

  • • Saved State Drive

  • • Solid Slash Drive

  • • Soska State Drive

Explanation

Question 92 of 121

1

86) SSDs are more susceptible to physical shock and vibration

Select one of the following:

  • True
  • False

Explanation

Question 93 of 121

1

87) SSDs are susceptible to mechanical wear :

Select one of the following:

  • True
  • False

Explanation

Question 94 of 121

1

88) Static RAM has a reduced power consumption, and a large storage capacity :

Select one of the following:

  • True
  • False

Explanation

Question 95 of 121

1

89) The "natural" unit of organization of memory is called block :

Select one of the following:

  • True
  • False

Explanation

Question 96 of 121

1

90) The advantage of virtual memory is that it takes less time to switch between applications because of additional memory :

Select one of the following:

  • True
  • False

Explanation

Question 97 of 121

1

91) The basic element of a semiconductor memory is the memory cell :

Select one of the following:

  • True
  • False

Explanation

Question 98 of 121

1

92) The execution time of a program clearly depends on the number of instructions :

Select one of the following:

  • True
  • False

Explanation

Question 99 of 121

1

he more clock rate of processor, the faster is processor :

Select one of the following:

  • True
  • False

Explanation

Question 100 of 121

1

94) The particular block is currently being stored is called tag :

Select one of the following:

  • True
  • False

Explanation

Question 101 of 121

1

95) The RAID scheme consists of 7 levels :

Select one of the following:

  • True
  • False

Explanation

Question 102 of 121

1

96) The rate at which data can be transferred into or out of a memory unit is called :

Select one of the following:

  • • Transfer Rate

  • • Speed Rate

  • • Popularity Rate

Explanation

Question 103 of 121

1

97) The time interval is called a clock rate

Select one of the following:

  • True
  • False

Explanation

Question 104 of 121

1

98) There are three types of cache addresses :

Select one of the following:

  • True
  • False

Explanation

Question 105 of 121

1

99) There are two types of mapping functions :

Select one of the following:

  • True
  • False

Explanation

Question 106 of 121

1

100) Three bits make hexadecimal digit :

Select one of the following:

  • True
  • False

Explanation

Question 107 of 121

1

101) We can find needed block in associatively mapped cache by its block address :

Select one of the following:

  • True
  • False

Explanation

Question 108 of 121

1

102) What does CPI stand for:

Select one of the following:

  • • Cycles Per Instruction

  • • Circles Per Instruction

  • • Cycles Per Intersection

  • • Curcuits Per Instruction

Explanation

Question 109 of 121

1

103) What does LRU stand for? :

Select one of the following:

  • • Least Recently Used

  • • Least Rarely Used

  • • Least Recently Unified

  • • Less Recently Used

Explanation

Question 110 of 121

1

104) What does RAID stand for?:

Select one of the following:

  • • Redundant Array of Independent Disks

  • • Reduced Array of Independent Disks

  • • Redundant Array of Independent Dots

  • • Restructered Array of Independent Disks

Explanation

Question 111 of 121

1

105) What is included into performance characteristic of computer memory systems? :

Select one or more of the following:

  • Access time

  • Cycle Time

  • Transfer Rate

  • Speed rate

Explanation

Question 112 of 121

1

106) What is included into physical type characteristic of computer memory systems? :

Select one or more of the following:

  • • Semiconductor

  • • Magnetic

  • • Laser

  • • Tapes

Explanation

Question 113 of 121

1

107) What is time elapsed to program execution? :

Select one or more of the following:

  • • CPU Time + I/O waiting

  • • Other programs

  • • Cycle Time

  • • Access time

Explanation

Question 114 of 121

1

108) Which digits are used in octal number system? :

Select one of the following:

  • 0-7

  • 0-8

  • 1-8

  • 1-7

Explanation

Question 115 of 121

1

109) Which stage is responsible for storing and loading values to and from memory?

Select one of the following:

  • • Memory read/write

  • • Write back

  • • Memory update

  • • Memory allocation

Explanation

Question 116 of 121

1

110) Which type of memory accessed via the input/output channels :

Select one or more of the following:

  • • Auxiliary Memory

  • • Secondary Memory

  • • Virtual memory

  • • Cache memory

Explanation

Question 117 of 121

1

111) Which type of memory stores frequently used data :

Select one of the following:

  • • Cache Memory

  • • Virtual Memory

  • • Secondary Memory

  • • Axuilary Memory

Explanation

Question 118 of 121

1

112) Word is the "natural" unit of organization of memory :

Select one of the following:

  • True
  • False

Explanation

Question 119 of 121

1

113) Halting the flow of instructions until the required result is ready to be used is called :

Select one of the following:

  • • stalling

  • • hailing

  • • falling

  • • feeling

Explanation

Question 120 of 121

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114) In virtual memory, memory can be used efficiently because a section of program always loaded :

Select one of the following:

  • True
  • False

Explanation

Question 121 of 121

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115) Choose the key characteristics of computer memory systems

Select one or more of the following:

  • Physical Type

  • Physical Characteristics

  • Access Method

  • Unit of Transfer

  • Performance

  • None of them

Explanation

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