Created by Nathan Hall
over 8 years ago
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CPU
Clock Speed
Registers
PC
MDR
MAR
CIR
ACC
General Purpose Registers
Buses
Data Bus
Address Bus
Control Bus
ALU
CU
Improving CPU performance
Von Neumann Architecture
Von Neumann Bottleneck
Harvard Architecture
Parallel Processing
Distributed Computing
SIMD
MIMD
RISC
CISC
RISC VS CISC
Input Device
Output Device
Storage Considerations
Optical Storage
Flash Storage
Magnetic Storage
Hybrid Drives
Virtual Storage
RAM
ROM
Cache Level Speeds