- CPU pipelining, a standard feature in RISC processors (processors that have a reduced instruction set, maximising performance by reducing microprocessor cycles per instruction) is like an assembly line. Because the processor works on different steps of the instruction at the same time, more instructions can be executed in a shorter time period.A useful analogy could be washing clothes. Let's say for example that the steps taken to wash different batches of dirty clothes were:1. Wash clothes in the washing machine2. Put them in the dryer3. Fold them4. Repeat steps for other batchesCompleting the steps one by one, meaning putting the 2nd batch of washing in after the first batch was folded would take longer than being efficient with the steps, and putting the 2nd batch in the washer whilst the 1st batch was in the dryer.This is essentially the way that pipelining works in the CPU with instructions. Whilst the first instruction is being executed, the next instruction will be found, located in memory, and raring to go, OR already being executed at different stages.