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Fetch, Decode & Execute Cycle
- The Fetch Step
- 1. Retrieve instruction from MAR and store in CIR
- 2. Address of instruction is stored in PC (a register)
- 3. Instructions are then passed to MAR
- 4. Instruction is fetched and PC is updated
- 1. Retrieve instruction from MAR and store in CIR
- The Decode Step
- 1. CPU identifies the op-code
- - This tells it what operation to preform
- - This tells it what operation to preform
- 2. CPU decodes the instruction in order to carry it out
- 1. CPU identifies the op-code
- The Execute Step
- 1. CU links parts of CPU that are needed to execute the instruction
- - The CPU is designed to understand a set of instructions
- - The CPU is designed to understand a set of instructions
- 1. CU links parts of CPU that are needed to execute the instruction
- Abbreviations
- CPU - Central Processing Unit
- CU - Control Unit
- CIR - Current Instruction
Register
- MAR - Memory Address
Register
- MDR - Memory Data
Register
- PC - Program
Counter
- ALU - Arithmetic Logic Unit
- CPU - Central Processing Unit
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