OCR GCSE Computer Science 1.1

Descripción

GCSE Computer Science Mapa Mental sobre OCR GCSE Computer Science 1.1, creado por Phantom Devi el 20/05/2021.
Phantom Devi
Mapa Mental por Phantom Devi, actualizado hace más de 1 año
Phantom Devi
Creado por Phantom Devi hace más de 3 años
362
1

Resumen del Recurso

OCR GCSE Computer Science 1.1
  1. CPU
    1. The CPUs purpose is to Fetch, Decode and Execute instructions
      1. Registers
        1. Small amounts of high speed dedicated memory
          1. Tend to hold one piece of data
            1. Types Of Registers
              1. MAR (Memory Address Register)
                1. Controls the which pieces of data are fetched Holds the address of the data to be fetched
                2. PC (Program Counter)
                  1. Keeps track of memory location for the next instruction Usually incremented to next location unless manipulated
                  2. CU (Control Unit)
                    1. Preforms all decoding of the instructions and how data moves around the CPU and memory interaction
                    2. MDR (Memory Data Register)
                      1. Stores any fetched data or any data which is to be transferred to memory
                      2. ALU (Arithmetic Logic Unit)
                        1. Preforms all the calculations and decisions required by the instruction E.g - Boolean operations
                        2. ACC (Accumulator)
                          1. Register that stores the results of any calculation from the ALU
                          2. CIR (Current Instruction Register)
                            1. Register which stores the most recent instructions whilst it is waiting to be decoded and executed
                        3. Also known as the processor, "Brains of the CPU"
                          1. Processes data and carries out instructions
                            1. Has a clock speed measured in Hertz
                              1. Cores
                                1. Each processor has a core
                                  1. Processors can be multi-core
                                    1. Dual core
                                      1. Quad core
                                        1. 8 core (+)
                                        2. Each core executes instructions independently
                                          1. For example, Dual cores can execute instructions twice as fast, (2 instructions at the same time
                                        3. CPU Performance
                                          1. Three things effect CPU performance
                                            1. Cache size
                                              1. Increasing cache size will reduce the number of memory to disk transfers and thus speed up the processing of instructions
                                                1. Cache
                                                  1. Stores next instructions
                                                    1. Very fast memory
                                                      1. Dedicated connections to CPU
                                                        1. Instructions copied from RAM
                                                          1. Multiple levels (L1, L2, L3)
                                                            1. Relatively expensive
                                                              1. Speeds up the computer, if has large capacity. This is because it can store frequently used instructions
                                                            2. Cores
                                                              1. Quadrupling the number of cores, may quadruple the number of instructions exectued per second
                                                                1. Cores
                                                                  1. A multiple core CPU will have a higher performance than a CPU with less cores
                                                                    1. 2 cores == 2 instructions able to be ran at the same time
                                                                  2. Clock speed
                                                                    1. Doubling the clock speed will double the number of instructions executing per second
                                                                      1. Clock Speed
                                                                        1. A CPU with a higher clock speed will process more instructions per second
                                                                          1. It will have a higher performance than an equivalent CPU with a lower clock speed
                                                                      2. Fetch, Decode and Execute
                                                                        1. 1. The Pc has the address of the next instruction to fetch
                                                                          1. 2. The value in the PC is copied to the MAR
                                                                            1. 3. The CU locates data
                                                                              1. 4. If it is instruction, it is placed in CIR, PC is incremented by 1, The instruction in CIR is decoded by the CU, The instruction is executed by placing any request for data in MAR for it to be collected and copied to MDR
                                                                      3. Buses
                                                                        1. A communication channel which can move data E.g USB (Universal Series Bus) transfers data between the computer system and a external device
                                                                          1. Types Of Bus
                                                                            1. Data Bus
                                                                              1. Carries the data from the memory to the MDR (Memory Data Register)
                                                                              2. Address Bus
                                                                                1. Carries memory address from CPU to any memory locations (MAR) Memory Address Register
                                                                                2. Control Bus
                                                                                  1. Carries control signals from processor to other compoments
                                                                              3. Made by (PhantomDevil)
                                                                                1. Other Media
                                                                                  1. Craig and Dave 1.1 Playlist (http://bit.ly/1_1_Playlist)
                                                                                  2. System Architecture
                                                                                    1. Von Neumann Architecture
                                                                                    2. Embedded Systems
                                                                                      1. A (computer) system within another system
                                                                                        1. Examples include: Car, Washing Machine, Dishwasher, Fridge
                                                                                          1. Characteristics: Firmware, Dedicated
                                                                                          Mostrar resumen completo Ocultar resumen completo

                                                                                          Similar

                                                                                          Computing Hardware - CPU and Memory
                                                                                          ollietablet123
                                                                                          SFDC App Builder 2
                                                                                          Parker Webb-Mitchell
                                                                                          Data Types
                                                                                          Jacob Sedore
                                                                                          Intake7 BIM L1
                                                                                          Stanley Chia
                                                                                          Software Processes
                                                                                          Nurul Aiman Abdu
                                                                                          Design Patterns
                                                                                          Erica Solum
                                                                                          CCNA Answers – CCNA Exam
                                                                                          Abdul Demir
                                                                                          Abstraction
                                                                                          Shannon Anderson-Rush
                                                                                          Spyware
                                                                                          Sam2
                                                                                          HTTPS explained with Carrier Pigeons
                                                                                          Shannon Anderson-Rush
                                                                                          Data Analytics
                                                                                          anelvr