CSI2334 computer systems fall 2023

Description

flashcards using the provided discussion questions and questions from past tests/homeworks----after you finish going thru flashcards, if you click "Restart deck," itll give you the option to hide known cards
Cate Arlinghaus
Flashcards by Cate Arlinghaus, updated 12 months ago
Cate Arlinghaus
Created by Cate Arlinghaus 12 months ago
33
0

Resource summary

Question Answer
how many different characters can be represented with ASCII 128 (is the answer she's looking for even though the "correct" answer is 256)
DeMorgan's laws in order not(xy) = not(x) + not(y) not(x+y) = not(xy)
describe pipelining -ability to execute instructions while prev instructions are still executing -stall can occur if shared hardware component is currently in use -the use of pipelining increases effective processor speed
esi and edi are...? -index registers
little endian least significant byte in the lowest memory address
big endian most significant byte in the lowest memory address
eax,ebx,ecx,edx -data/general registers -32 bit/doubleword
esp stack pointer
EBP BASE POINTER
cs, ds, es, fs, gs, ss 16-bit segment registers
eip instruction pointer, address of next instruction to be fetched
EFLAGS 32-bit flags register
three types of assembly instructions directives macros instructions
directives tells the assembler to take some action. Such an action generally does not result in machine instructions and may or may not cause object code to be generated ex: .DATA, .STACK
macros “shorthand” for a sequence of other statements— instructions, directives, or even other macros. The assembler expands a macro to the statements it represents, and then assembles the resulting statements ex: input, output, atod, dtoa
instruction is translated by the assembler into 1 or more bytes of object code (machine code) that is executed at run time ex: mov, add, mul
what happens in the _declspec c++ calling convention -parameters are widened to 32 bits and passed in reverse order -eip's contents are pushed onto stack (return address) -after function termination, c++ cleans up stack and restores esp to location before fxn prologue
how do you determine the sign of the remainder when doing idiv operations? sign of remainder is always the same as the dividend (edx:eax)
what sizes need prefix bytes quadword, word
how is 80x86 memory arranged collection of slots, each holds 1 byte of instruction/data
what is the last address of 32-bit, 512 MB RAM processor --->(number of MB * size of MB) - 1 --->(512 * 2^20 ) - 1 = 2^29 - 1 = 1FFF FFFFh
list amount of memory a kilobyte, megabyte, gigabyte, and terabyte all hold kilo: 2^10 = thousand mega: 2^20 = million giga: 2^30 = billion tera: 2^40 = 1000 GB
which way(s) can data travel using the address bus and data bus data bus: from cpu to main memory and from main memory to cpu address bus: ONLY from cpu to main memory (not back)
using this line of code: 00000005 03 05 00000004 R add eax, num2 label the opcode, object code, and address address: 00000005 opcode: 03 object code: 03 05 00000008
what is "enter key" stored as in memory 0D 0A (CR LF)
turn this standard hex number into little endian format: FFFF 05F1h F105FFFF
label the addressing modes of the following: [ebx] ebx 05h intVar [ebx]: memory mode-register indirect ebx: register mode 05h: immediate mode intVar: memory mode- direct
what are the restrictions on label/variable names -cant use a reserved word (like loop, add, for, etc) -cant start with a number
how long is the ascii string that the "wtoa" and "dtoa" macros convert 6 bytes and 11 bytes
why does "add [eax], 5" produce a syntax error but "add [eax], ebx" does not? in "add [eax], 5," the size of the value [eax] is point to is unclear because "5" can be any size (byte,word,etc) but in "add [eax],ebx," the size of [eax] is implied to be DWORD bc thats what ebx's size is
what does "atod string" do scans memory starting at the location of "string" and looks for the ASCII representation of a number. once found, it converts the ASCII representation to the corresponding 2’s complement doubleword integer. This doubleword is always stored in EAX —no destination operand is allowed.
what does "input prompt, dest, 30" do generates a dialogue box with label specified by "prompt", where prompt references a string in the data segment. when OK is pressed, up to "30" characters are copied from the dialogue box to memory at "dest"
what does "wtoa result, bx" do converts the word at "bx" to a 6-byte long ascii string in "result"
in a .lst file, when you look at the encoding of certain instructions, the encoding may have an 'R' after it. what does the R mean relocatable
why do we include null bytes in our data segment so that the computer knows when to stop scanning memory (like when using the wtoa macro)
why does instruction mov ebx, 42 not need a modR/M byte modR/M is not needed for immediate to register because the immediate value is just assembled directly into the object code instead, and this + the opcode gives the assembler enough information
in general, what does "2+" mean for register indirect mode 2+0
keeping in mind that the chart says this type of instruction requires "6+" bytes of object code, which instruction requires more: mov memVar, 10 mov DWORD PTR[edx], 10 mov memVar, 10 requires 6+4 mov DWORD PTR[edx], 10 requires only 6 Because: 1ST INSTRUCTIONS OBJECT CODE: opcode + ModR/M + address of data in memory + immediate value 2ND INSTRUCTIONS: same, but without the address of data in memory required
location of different flag bits on EFLAG register
which instructions do not affect eflags mov push xchg pop lea inc and dec cbw, cwd, cdq not (maybe also: loop)
how does div/idiv affect eflags it changes them, but not in an understandable/predictable way
how does mul affect flags CF and OF are 0 if high-order half of the product is zero, and set to 1 if the high-order half is not zero. (i.e, tells you whether the product was the same size as the source)
how does imul affect flags CF and OF are 1 if any bit in the high-order half is different from the sign bit in the low-order half
difference btwn backward and forward reference (relative short jmp) backward: 128 bytes forward: 127 bytes
why do we want to minimize jumps -obstructs flow of code/isnt good design -negatively affects pipelining--> can't execute next instruction at same time as current instruction bc you have to wait to see whether the condition to jump will be fulfilled or not
what does "cmp num2, 20" do same as sub num2, 20, but without modifying num2-->modifies flags as if we did num2 - 20
which flags do unsigned jumps look at ZF and CF only because ZF tells you if the two values were equal, and CF tells you which was bigger (you need a carry in if the second value was bigger)
what does "loop statement label" do • ecx -= 1. • If the new value in ECX is 0, then execution continues with the statement following the loop instruction. • If the new value in ECX is nonzero, then a jump to the instruction at statementLabel takes place --can only jump 128 back/127 bytes forward
what does "pop ebx" do -goes to address on stack that ESP contains and copies the DWORD value into ebx -increments esp by 4
what does "push ebx" do ESP is decremented by 4. ebx is then stored at address in ESP
relative short/relative near displacement short: 8 bit displacement near: 32 bit displacement
what does call do saves the address of the next instruction (the one immediately following the call), then transfers control to the procedure code. It does this by pushing EIP onto the stack and then changing EIP to contain the address of the first instruction of the procedure.
what does ret do reverse of what call does (pops eip, transfers control)
what do these instructions do: and source, dest or source, dest xor source, dest not source each of them "ands/ors/xors/nots" each individual bit of source with each individual bit of dest and stores the result in source. modifies flags too EXCEPT not
what is a mask A value used with a logical instruction (shl, shr, sar, sal) only to alter bit values
how do logical operations (and, or, xor) affect EFLAGS CF and OF: always 0 SF and ZF: based on whatever result is PF: corresponds to parity of JUST the low-order byte of the result.
what does "test num1, 20" do "ands" num1 and 20 w/out changing value in num1
arithmetic vs logical shifts arithmetic and logical LEFT shifts: exactly the same arithmetic RIGHT shift: the new bits are filled with the sign bit logical RIGHT shift: the new bits are filled with 0s
how are status bits affected by shift instructions -For both logical and arithmetic: ---last bit that shifts off is saved in CF. ---SF, ZF, PF are as expected. ----OF is undefined for a multiple-bit shift; for a single-bit shift it is 0 if the sign bit of the result is the same as the sign bit of the original operand value
5 stages of the instruction execution cycle -instruction fetch -instruction decode (w/data bus) -data fetch (w/address bus) -execution -return result
where and why do bottlenecks happen and how do we prevent them happens when multiple processes need the same hardware/computer components--specifically, SYSTEM BUS. This means that the computer cannot execute multiple things at once and the runtime is slowed down. To prevent bottlenecks, diversify variables/instructions and make sure to avoid points in a program where everything is being run on one component/register--also, LIMIT TRIPS TO MEMORY
why does single precision floating point format provide us with 7 decimal digits of precision The single format has 24 significant fraction bits, the implied leading 1 bit plus the 23 bits that are stored, for 2^23 distinct patterns. Since 2^23 = 8,388,608, which has seven digits, the single format has about seven decimal digits of precision
differences between single, double, and extended-double precision floating point formats
how is 0 stored as a floating point value since 0 cannot be normalized (stored as a mantissa with an implied "1." at the front), it is represented with all 0 bits (+0) or a 1 followed by all 0 bits (-0)
how is +/- infinity and NaN represented as a floating point value infinity: sign = 0 for positive infinity, 1 for negative infinity. exponent = all 1 bits. fraction = all 0 bits. NaN: all 1 bits for the exponent and some non-zero value in the fraction
how many floating-point registers are there, how long are they, and how are they organized 8 registers, all 80 bits long, and they are organized like a stack
good info to know about labels for jump statements lol --multiple labels can reference the same instruction in memory. -Labels are not part of object code, so extra labels do not add to the length of object code or to execution time. -might want to use multiple labels to make code clearer
why are there duplicate mnemonics for the various jump instructions? (i.e. jb and jc generate the same machine code and do the same thing-- so why don't we just use jc?) because sometimes one mnemonic is more natural than the other for implementation of a given design-- lends itself to clean and straightforward code
why is a decrementing count-controlled loop better than incrementing? because a decrementing loop can just use the "loop instruction"--> causes cleaner and more comprehensible code, as well as usually more efficient than using many cmp, jmp, or inc statements
how do you establish a pointer to memory and why would you do this over using memory directly --> "lea dest, source" loads the address of source into dest -->would do this in the case of using an array, where you need the address of the first element and then can just add to this value to get any other element in the array
Show full summary Hide full summary

Similar

Computing Hardware - CPU and Memory
ollietablet123
SFDC App Builder 2
Parker Webb-Mitchell
Data Types
Jacob Sedore
Intake7 BIM L1
Stanley Chia
Software Processes
Nurul Aiman Abdu
Design Patterns
Erica Solum
CCNA Answers – CCNA Exam
Abdul Demir
Abstraction
Shannon Anderson-Rush
Spyware
Sam2
HTTPS explained with Carrier Pigeons
Shannon Anderson-Rush
Data Analytics
anelvr