Question | Answer |
what does the CPU do? | it processes all of the data and instructions that make the system work |
What does processing power depend on? | clock speed, number of caches and cache size. |
what are the 2 main types of architecture? | Von Neumann and Harvard |
What are the 3 main parts of the CPU? | the control unit, the arithmetic logic unit and the cache |
what is the control unit? | The overall control of the CPU. It controls the flow of data inside the CPU and outside the CPU. |
What is the ALU? | performs logic operations such as AND, OR and NOT. It contains the accumulator and it does all of the calculations. |
What is the cache? | Very fast memory in the CPU. It is slower than registers but faster than RAM. They are expensive compared to RAM and secondary storage. |
what does the cache store? | regularly used data so the CPU can access it quickly when its next opened. |
what are the different levels of the cache? | L1, L2 & L3. L1 is quickest but has slowest capacity. L2 is slower than L1 but can hold more. L3 is slowest but holds the most |
What does the CPU do if the data is not in the cache? | it will fetch it from ROM |
what is the difference between Von Neumann and Harvard architecture? | Harvard has a separate memory for both data and instructions, where as Von Neumann has one memory for both |
What does the PC (Program Counter) do? | The PC holds the memory addresses of the next instruction to be dealt with |
What does the accumulator (ACC) do? | stores results of the ALU. |
What does the MAR (memory address register) do? | holds the memory address waiting to be used by the CPU. |
What does the MDR (memory data register) do? | Holds the actual data or instruction either waiting to be written to memory or has been fetched. |
What does the memory do? | holds the program instructions and the program data |
what is the fetch-decode-execute cycle? | fetch, decodes and executes instructions |
what is 'fetch' in the FDE cycle? (STOP TRYING TO MAKE FETCH HAPPEN!) | copies memory addresses from the program counter to the MAR. Copies the instruction stored in the MAR address to the MDR. Increase the PC to point to the next address of the next instruction |
what is 'decode' in the FDE cycle? | The instruction in the MDR is decoded by the CU. |
what is 'execute' in the FDE cycle? | The instruction is performed |
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