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8873108
1.1 Sys Architecture
Description
GCSE Computing Mind Map on 1.1 Sys Architecture, created by Mr R on 10/05/2017.
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computing
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Mr R
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Mr R
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Resource summary
1.1 Sys Architecture
Registers
MAR
Holds memory address about to be used by the CPU
MDR
Holds data or instructions that have been fetched from memory
Program Counter
Holds the memory address of the instruction for each cycle
Accumulator
Stores the results of the calculations done by the ALU
FDE cycle
Fetch
Decode
Execute.
Characteristics
Clock speed
Number of instructions that can be carried out in a second (Hz) - These days in Ghz (Billion)
Cache size
Refers to how many frequently used instructions can be stored in the cache on the CPU.
Number of cores
How many individual processors (cores) are on a chip. The more cores, the more instructions can be done simultaneously.
Embedded systems
A computer system built into another device (usually designed for a specific purpose)
Components
ALU
Performs logical operations (AND, OR, NOT), Shift operations and Arithmetic operations (+,-, *, / )
Control Unit (CU)
Controls activities in the CPU (Such as flow of data between CPU and other parts) and makes FDE cycle happen in correct order
Cache
Sits between the CPU and RAM. Very fast. Holds frequently used data so that the processor doesn't have to keep going back and forth to the RAM.
Purpose of the CPU
Central processing Unit - This processes all of the data and instructions that make a computer system work
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