Questão 1
Questão
Associative Mapping
Responda
-
• Each block mapped to any cache location
-
• Each memory block is mapped to exactly one block in the cache
-
• Each block mapped to subset of cache locations
Questão 2
Responda
-
• Each block mapped to any cache location
-
• Each memory block is mapped to exactly one block in the cache
-
• Each block mapped to subset of cache locations
Questão 3
Questão
Set-Associative Mapping
Responda
-
• Each block mapped to any cache location
-
• Each memory block is mapped to exactly one block in the cache
-
• Each block mapped to subset of cache locations
Questão 4
Questão
• Structural hazards
Responda
-
different instructions in different stages (or the same stage) conflicting for the same resource
-
an instruction cannot continue because it needs a value that has not yet been generated by an earlier instruction
-
fetch cannot continue because it does not know the outcome of an earlier branch – special case of a data hazard
Questão 5
Responda
-
different instructions in different stages (or the same stage) conflicting for the same resource
-
an instruction cannot continue because it needs a value that has not yet been generated by an earlier instruction
-
fetch cannot continue because it does not know the outcome of an earlier branch – special case of a data hazard
Questão 6
Questão
• Control hazards
Responda
-
different instructions in different stages (or the same stage) conflicting for the same resource
-
an instruction cannot continue because it needs a value that has not yet been generated by an earlier instruction
-
fetch cannot continue because it does not know the outcome of an earlier branch – special case of a data hazard
Questão 7
Questão
• Compulsory misses
Responda
-
The very first access to a block cannot be in the cache
-
Occurs if the cache cannot contain all the blocks needed during execution of a program
-
Occurs if the block placement strategy is not fully associative
Questão 8
Questão
• Capacity misses
Responda
-
The very first access to a block cannot be in the cache
-
Occurs if the cache cannot contain all the blocks needed during execution of a program
-
Occurs if the block placement strategy is not fully associative
Questão 9
Questão
• Conflict misses
Responda
-
The very first access to a block cannot be in the cache
-
Occurs if the cache cannot contain all the blocks needed during execution of a program
-
Occurs if the block placement strategy is not fully associative
Questão 10
Questão
4) Choose the feature(s) of first generation computer architecture
Questão 11
Questão
5) A common measure of performance for a processor is the rate at which instructions are executed, called
Responda
-
• CPI
-
• Clock Rate
-
• MFLOPS
-
• MIPS
Questão 12
Questão
6) A technique used in advanced microprocessors where the microprocessor begins executing a first instruction before the second has been completed is called pipelining
Questão 13
Questão
7) Choose the features of third generation computer architecture
Questão 14
Questão
8) Choose advanced cache optimizations
Responda
-
• Giving Reads Priority over Writes
-
• Larger Cache Size
-
• Hardware Prefetching of Instructions and Data
-
• Merging Write Buffer
-
• Critical Word First and Early Restart
Questão 15
Questão
9) Choose basic cache optimizations
Responda
-
• Compiler-Controlled Prefetching
-
• Nonblocking Caches
-
• Small and Simple First-Level Caches
-
• Multilevel Caches
-
• Avoiding Address Translation during Cache Indexing
Questão 16
Questão
10) Choose data dependences
Responda
-
• Read-After-Read
-
• Read-After-Write
-
• Write-After-Write
-
• Write-After-Read
Questão 17
Questão
11) Choose hazard for the following definition: an instruction cannot continue because it needs a value that has not yet been generated by an earlier instruction
Responda
-
• Data
-
• Structural
-
• Control
Questão 18
Questão
12) Choose hazard for the following definition: different instructions in different stages (or the same stage) conflicting for the same resource
Responda
-
o Structural
-
o Data
-
o Control
Questão 19
Questão
13) Choose hazard for the following definition: fetch cannot continue because it does not know the outcome of an earlier branch - special case of a data hazard
Responda
-
o Control
-
o Structural
-
o Data
Questão 20
Questão
14) Choose the access method(s)
Responda
-
o Parallel Access
-
o Indirect Access
-
o Random Access
-
o Direct Access
-
o Sequential Access
Questão 21
Questão
15) Choose the component of SSD for the following definition: High speed RAM memory components used for speed matching and to increased data throughput
Questão 22
Questão
16) Choose the component of SSD for the following definition: Individual NAND flash chips
Questão 23
Questão
17) Choose the component of SSD for the following definition: Logic for error detection and correction
Questão 24
Questão
18) Choose the component of SSD for the following definition: Logic that performs the selection function across the flash memory components
Questão 25
Questão
19) Choose the component of SSD for the following definition: provides SSD device level interfacing and firmware execution
Questão 26
Questão
20) Choose the components of SSD
Responda
-
o Controller
-
o Addressing
-
o Data buffer/cache
-
o Data size
-
o Memory hierarchy
Questão 27
Questão
21) Choose the definition for capacity misses
Responda
-
o Occurs if the cache cannot contain all the blocks needed during execution of a program
-
o The very first access to a block cannot be in the cache
-
o Occurs if the block placement strategy is not fully associative
Questão 28
Questão
22) Choose the definition for compulsory misses
Responda
-
o Occurs if the cache cannot contain all the blocks needed during execution of a program
-
o Occurs if the block placement strategy is not fully associative
-
o The very first access to a block cannot be in the cache
Questão 29
Questão
23) Choose the definition for conflict misses
Responda
-
o Occurs if the block placement strategy is not fully associative
-
o Occurs if the cache cannot contain all the blocks needed during execution of a program
-
o The very first access to a block cannot be in the cache
Questão 30
Questão
24) Choose the element(s) of cache design
Responda
-
o Tag
-
o Latency
-
o AMAT
-
o Mapping Function
-
o Replacement Algorithm
-
o Number of Caches
Questão 31
Questão
25) Choose the element(s) of cache design
Responda
-
o Tag
-
o AMAT
-
o Latency
-
o Cache Size
-
o Line Size
-
o Number of Caches
Questão 32
Questão
26) Choose the feature(s) of first generation computer architecture
Responda
-
o Magnetic core memory
-
o Semiconductor memory
-
o Machine code
-
o Assembly language
-
o Vacuum tubes
Questão 33
Questão
27) Choose the feature(s) of fourth generation computer architecture
Responda
-
o Object-Oriented programming
-
o Wide spread use of data communications
-
o Smallest in size
-
o Use of cache memory
-
o Use of drum memory or magnetic core memory
Questão 34
Questão
28) Choose the feature(s) of second generation computer architecture
Questão 35
Questão
29) Choose the feature(s) of third generation computer architecture
Questão 36
Questão
30) Choose the key characteristics of computer memory systems
Responda
-
o Location
-
o Unit of Transfer
-
o Access Method
-
o Stalling
-
o Hazards
Questão 37
Questão
31) Choose the key characteristics of computer memory systems
Responda
-
o Capacity
-
o Performance
-
o Organization
-
o Instruction Fetch
-
o Instruction Decode
Questão 38
Questão
32) Choose the key characteristics of computer memory systems
Questão 39
Questão
33) Choose the performance factor
Questão 40
Questão
34) Choose the performance factor(s)
Questão 41
Questão
36) Choose the physical characteristic(s) of disk systems
Questão 42
Questão
36) Choose the physical characteristic(s) of disk systems
Questão 43
Questão
37) Choose the right formula for AMAT
Responda
-
o AMAT \= Hit time + Miss rate + Miss penalty
-
o AMAT \= Hit time * Miss rate + Miss penalty
-
o AMAT \= Hit time * Miss rate * Miss penalty
-
o AMAT \= Hit time + Miss rate * Miss penalty
Questão 44
Questão
38) Choose the system attribute(s) by which the performance factors are influenced
Questão 45
Questão
39) Choose the type(s) of auxiliary memory
Responda
-
o Flash Memory
-
o Optical Disk
-
o Hard Drive
-
o SSD
-
o RAM
Questão 46
Questão
40) Choose the years of the first generation computer architecture
Responda
-
o 1958-1964
-
o 1964-1974
-
o 1974-present
-
o 1945-1964
-
o 1945-1958
Questão 47
Questão
41) Choose the years of the second generation computer architecture
Responda
-
o 1945-1958
-
o 1964-1974
-
o 1974-present
-
o 1945-1964
-
o 1958-1964
Questão 48
Questão
42) Choose two types of models for a computing machine
Questão 49
Questão
43) CPU Time \= I * CPI / R. Which parameter requires special profiling software?
Questão 50
Questão
44) Floating point performance is expressed as
Responda
-
o CPI
-
o FLOPS
-
o MIPS
-
o MFLOPS
Questão 51
Questão
45) For random-access memory, the time it takes to perform a read or write operation is called
Responda
-
o Clock Rate
-
o CPI
-
o Access Time
-
o Latency
Questão 52
Questão
Four bits make octal digit
Questão 53
Questão
47) Halting the flow of instructions until the required result is ready to be used is called
Responda
-
o waiting
-
o delaying
-
o halting
-
o stalling
Questão 54
Questão
48) How a binary digit is called?
Responda
-
o byte
-
o digit
-
o kilobyte
-
o bit
Questão 55
Questão
49) How a memory unit accessed by contents is called?
Questão 56
Questão
50) How external nonvolatile memory is called?
Responda
-
o Secondary memory
-
o Main memory
-
o Cache memory
-
o Virtual memory
Questão 57
Questão
51) How many access methods are there?
Questão 58
Questão
52) how many elements of cache design are there?
Questão 59
Questão
53) How many generations of computer architecture are there?
Questão 60
Questão
54) How many number systems are there?
Questão 61
Questão
55) How many performance factors are there
Questão 62
Questão
56) How many physical characteristics of disk systems are there?
Questão 63
Questão
57) How the stage in which the results of the operation are written to the destination register is called?
Responda
-
o Instruction Fetch
-
o Write Back
-
o Instruction Decode
-
o Execution
-
o Memory read/write
Questão 64
Questão
58) IBM System/360 Model 91 was introduced in 1966
Questão 65
Questão
59) In 1976 Apple II computer model was released
Questão 66
Questão
60) In execution stage identification of the operation is performed
Questão 67
Questão
61) In LRU replacement algorithm, the block that is in the cache longest is replaced
Questão 68
Questão
62) In virtual memory, memory can be used efficiently because a section of program always loaded
Questão 69
Questão
63) In which cache memory mapping technique any block from main memory can be placed anywhere in the cache?
Questão 70
Questão
64) In which cache memory mapping technique any memory block is mapped to exactly one block in the cache?
Questão 71
Questão
65) In which cache memory mapping technique any memory block mapped to subset of cache locations?
Questão 72
Questão
66) Into how many parts a program (or algorithm) which can be parallelized can be split up?
Questão 73
Questão
67) Select cache optimizations to reduce miss penalty
Questão 74
Questão
68) Select cache optimizations to increase the Cache Bandwidth
Questão 75
Questão
69) Octal and hexadecimal numbers are hard on use and conversion
Questão 76
Questão
70) Physical address used by program, and which OS must translate into virtual address
Questão 77
Questão
Pipelining can only be implemented on hardware
Questão 78
Questão
Process of instruction execution is divided into two or more steps, called
Responda
-
o pipelining
-
o pipe stages
-
o pipe segments
-
o instruction execution
-
o pipeline hazard
Questão 79
Questão
73) ROM is the place in a computer where the operating system, application programs, and data in current use are kept.
Questão 80
Questão
74) Choose the features of first generation computer architecture
Responda
-
o Vacuum tubes
-
o Assembly language
-
o Magnetic core memory
-
o Semiconductor memory
-
o Machine code
Questão 81
Questão
75) How a memory unit accessed by contents is called?
Questão 82
Questão
76) Choose the access methods
Responda
-
o Random Access
-
o Parallel Access
-
o Sequential Access
-
o Indirect Access
-
o Direct Access
Questão 83
Questão
77) Which type of memory accessed via the input/output channels?
Responda
-
o Auxiliary Memory
-
o Secondary Memoory
-
o Main Memory
-
o Cache Memory
-
o Virtual Memory
Questão 84
Questão
78) Which type of memory stores frequently used data?
Responda
-
o Cache Memory
-
o Auxiliary Memory
-
o Main Memory
-
o Virtual Memory
-
o Secondary Memory
Questão 85
Questão
79) Stage in which the instruction is fetched from memory and placed in the instruction register called
Responda
-
o Instruction Fetch
-
o Instruction Decode
-
o Memory read/write
-
o Execution
-
o Write Back
Questão 86
Questão
80) Which stage is responsible for storing and loading values to and from memory?
Responda
-
o Instruction Fetch
-
o Instruction Decode
-
o Execution
-
o Memory read/write
-
o Write Back
Questão 87
Questão
81) How the stage in which the results of the operation are written to the destination register is called?
Responda
-
o Instruction Fetch
-
o Instruction Decode
-
o Execution
-
o Memory read/write
-
o Write Back
Questão 88
Questão
82) Select cache optimizations to reduce hit time (both basic and advanced)
Responda
-
o Avoiding Address Translation during Cache Indexing
-
o Small and Simple First-Level Caches
-
o Way Prediction
-
o Compiler Optimizations
-
o Compiler-Controlled Prefetching
Questão 89
Questão
83) Select the correct interpretation(s) of Amdahl's Law
Responda
-
o is used to compare computers' performance
-
o is used calculate the execution time of a program
-
o is used to find the maximum expected improvement
-
o it means that it is the algorithm that decides the speedup not the number of processors
Questão 90
Questão
84) SSD is over 10 times faster than the spinning disks in HDD
Questão 91
Questão
85) SSD stands for :
Responda
-
• Solid State Drive
-
• Saved State Drive
-
• Solid Slash Drive
-
• Soska State Drive
Questão 92
Questão
86) SSDs are more susceptible to physical shock and vibration
Questão 93
Questão
87) SSDs are susceptible to mechanical wear :
Questão 94
Questão
88) Static RAM has a reduced power consumption, and a large storage capacity :
Questão 95
Questão
89) The "natural" unit of organization of memory is called block :
Questão 96
Questão
90) The advantage of virtual memory is that it takes less time to switch between applications because of additional memory :
Questão 97
Questão
91) The basic element of a semiconductor memory is the memory cell :
Questão 98
Questão
92) The execution time of a program clearly depends on the number of instructions :
Questão 99
Questão
he more clock rate of processor, the faster is processor :
Questão 100
Questão
94) The particular block is currently being stored is called tag :
Questão 101
Questão
95) The RAID scheme consists of 7 levels :
Questão 102
Questão
96) The rate at which data can be transferred into or out of a memory unit is called :
Responda
-
• Transfer Rate
-
• Speed Rate
-
• Popularity Rate
Questão 103
Questão
97) The time interval is called a clock rate
Questão 104
Questão
98) There are three types of cache addresses :
Questão 105
Questão
99) There are two types of mapping functions :
Questão 106
Questão
100) Three bits make hexadecimal digit :
Questão 107
Questão
101) We can find needed block in associatively mapped cache by its block address :
Questão 108
Questão
102) What does CPI stand for:
Responda
-
• Cycles Per Instruction
-
• Circles Per Instruction
-
• Cycles Per Intersection
-
• Curcuits Per Instruction
Questão 109
Questão
103) What does LRU stand for? :
Responda
-
• Least Recently Used
-
• Least Rarely Used
-
• Least Recently Unified
-
• Less Recently Used
Questão 110
Questão
104) What does RAID stand for?:
Responda
-
• Redundant Array of Independent Disks
-
• Reduced Array of Independent Disks
-
• Redundant Array of Independent Dots
-
• Restructered Array of Independent Disks
Questão 111
Questão
105) What is included into performance characteristic of computer memory systems? :
Responda
-
Access time
-
Cycle Time
-
Transfer Rate
-
Speed rate
Questão 112
Questão
106) What is included into physical type characteristic of computer memory systems? :
Responda
-
• Semiconductor
-
• Magnetic
-
• Laser
-
• Tapes
Questão 113
Questão
107) What is time elapsed to program execution? :
Responda
-
• CPU Time + I/O waiting
-
• Other programs
-
• Cycle Time
-
• Access time
Questão 114
Questão
108) Which digits are used in octal number system? :
Questão 115
Questão
109) Which stage is responsible for storing and loading values to and from memory?
Responda
-
• Memory read/write
-
• Write back
-
• Memory update
-
• Memory allocation
Questão 116
Questão
110) Which type of memory accessed via the input/output channels :
Responda
-
• Auxiliary Memory
-
• Secondary Memory
-
• Virtual memory
-
• Cache memory
Questão 117
Questão
111) Which type of memory stores frequently used data :
Responda
-
• Cache Memory
-
• Virtual Memory
-
• Secondary Memory
-
• Axuilary Memory
Questão 118
Questão
112) Word is the "natural" unit of organization of memory :
Questão 119
Questão
113) Halting the flow of instructions until the required result is ready to be used is called :
Responda
-
• stalling
-
• hailing
-
• falling
-
• feeling
Questão 120
Questão
114) In virtual memory, memory can be used efficiently because a section of program always loaded :
Questão 121
Questão
115) Choose the key characteristics of computer memory systems
Responda
-
Physical Type
-
Physical Characteristics
-
Access Method
-
Unit of Transfer
-
Performance
-
None of them