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CSA (Your Christmas Gift)

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God Philosophy Quiz sobre CSA (Your Christmas Gift), criado por хомяк убийца em 23-03-2019.
хомяк убийца
Quiz por хомяк убийца, atualizado more than 1 year ago
хомяк убийца
Criado por хомяк убийца mais de 5 anos atrás
312
6
0

Resumo de Recurso

Questão 1

Questão
Operations performed by a processor, such as fetching an instruction, decoding the instruction, performing an arithmetic operation, and so on, are governed by:
Responda
  • a system clock
  • a system processor
  • a clock processor
  • a processor
  • a clock

Questão 2

Questão
Typically all operations performed by a processor begin with the:
Responda
  • pulse of the clock
  • pulse of the processor
  • it begins by itself
  • both of clock and processor pulse
  • none of the above

Questão 3

Questão
The time between pulses called?
Responda
  • clock speed
  • clock rate
  • cycle time
  • clock cycle
  • cycle rate

Questão 4

Questão
Typically, clock signals are generated by a ______, which generates a constant signal wave while power is applied.
Responda
  • quartz crystal
  • calcium crystal
  • zinc crystal
  • mercury crystal
  • radium crystal

Questão 5

Questão
A processor is driven by a clock with a constant frequency f or, equivalently, a constant cycle time t, where t = 1/f:
Responda
  • Instruction execution rate
  • Instruction execution cycle
  • Instruction execution time
  • Instruction execution period
  • None of the above

Questão 6

Questão
Average cycles per instruction of a program called:
Responda
  • CPU
  • Clock cycle time
  • CPI
  • Clock rate
  • CPE

Questão 7

Questão
__ is a collection of programs, defined in a high-level language, that together attempt to provide a representative test of a computer in a particular application or system programming area.
Responda
  • A benchmark suite
  • A performance suite
  • A IDE suite
  • A MIPS suite
  • None of the above

Questão 8

Questão
Measures such as MIPS and MFLOPS have proven adequate to evaluating the performance of processors
Responda
  • True
  • False

Questão 9

Questão
SPEC Benchmarks, which evaluates the performance of World Wide Web (WWW) servers:
Responda
  • SPECjvm98
  • SPECjbb2000
  • SPECweb99
  • SPECmail2001
  • all of the above

Questão 10

Questão
SPEC Benchmarks, which intended to evaluate performance of the combined hardware and software aspects of the Java Virtual Machine (JVM) client platform:
Responda
  • SPECjvm98
  • SPECjbb2000
  • SPECweb99
  • SPECmail2001
  • all of the above

Questão 11

Questão
SPEC Benchmarks, which for evaluating server-side Java-based electronic commerce applications:
Responda
  • SPECjvm98
  • SPECjbb2000
  • SPECweb99
  • SPECmail2001
  • all of the above

Questão 12

Questão
SPEC Benchmarks, which designed to measure a system’s performance acting as a mail server
Responda
  • SPECjvm98
  • SPECjbb2000
  • SPECweb99
  • SPECmail2001
  • all of the above

Questão 13

Questão
ENIAC stands for:
Responda
  • Electronic Numerical Integrator and Computer
  • Electronic Nuclear Integrator and Computer
  • Encapsulation Numerical Integrator and Commerce
  • Encapsulation Numerical Integrator and Computer
  • Electronic Numerical Integer and Computer

Questão 14

Questão
The general structure of the IAS computer:
Responda
  • main memory
  • arithmetic and logic unit
  • control unit
  • Input/output equipment
  • all of the above

Questão 15

Questão
Contains a word to be stored in memory or sent to the I/O unit, or is used to receive a word from memory or from the I/O unit
Responda
  • Memory buffer register (MBR)
  • Memory address register (MAR)
  • Instruction register (IR)
  • Instruction buffer register (IBR)
  • Program counter (PC)

Questão 16

Questão
Specifies the address in memory of the word to be written from or read into the MBR
Responda
  • Memory buffer register (MBR)
  • Memory address register (MAR)
  • Instruction register (IR)
  • Instruction buffer register (IBR)
  • Program counter (PC)

Questão 17

Questão
Contains the 8-bit opcode instruction being executed.
Responda
  • Memory buffer register (MBR)
  • Memory address register (MAR)
  • Instruction register (IR)
  • Instruction buffer register (IBR)
  • Program counter (PC)

Questão 18

Questão
Employed to hold temporarily the right-hand instruction from a word in memory
Responda
  • Memory buffer register (MBR)
  • Memory address register (MAR)
  • Instruction register (IR)
  • Instruction buffer register (IBR)
  • Program counter (PC)

Questão 19

Questão
Contains the address of the next instruction pair to be fetched from memory.
Responda
  • Memory buffer register (MBR)
  • Memory address register (MAR)
  • Instruction register (IR)
  • Instruction buffer register (IBR)
  • Program counter (PC)

Questão 20

Questão
Transistor is a solid-state device, made from silicon
Responda
  • True
  • False

Questão 21

Questão
The use of the _______ defines the second generation of computers.
Responda
  • Vacuum tube
  • Transistor
  • Small- and medium-scale integration
  • Large-scale integration
  • Very-large-scale integration

Questão 22

Questão
The use of the _______ defines the first generation of computers.
Responda
  • Vacuum tube
  • Transistor
  • Small- and medium-scale integration
  • Large-scale integration
  • Very-large-scale integration

Questão 23

Questão
The use of the ________ defines the third generation of computers.
Responda
  • Vacuum tube
  • Transistor
  • Small- and medium-scale integration
  • Large-scale integration
  • Very-large-scale integration

Questão 24

Questão
The use of the _________ defines the fourth generation of computers.
Responda
  • Vacuum tube
  • Transistor
  • Small- and medium-scale integration
  • Large-scale integration
  • Very-large-scale integration

Questão 25

Questão
The use of the _________ defines the fifth generation of computers.
Responda
  • Vacuum tube
  • Transistor
  • Small- and medium-scale integration
  • Large-scale integration
  • Very-large-scale integration

Questão 26

Questão
Moore’s law: “The cost of a chip has remained virtually unchanged during this period of rapid growth in density. This means that the cost of computer logic and memory circuitry has increasing at a dramatic
Responda
  • True
  • False

Questão 27

Questão
Moore’s law: “Because logic and memory elements are placed closer together on more densely packed chips, the electrical path length is shortened, decreasing operating speed”
Responda
  • True
  • False

Questão 28

Questão
Moore’s law: “The computer becomes smaller, making it more convenient to place in a variety of environments”
Responda
  • True
  • False

Questão 29

Questão
Moore’s law: “There is a reduction in power and cooling requirements”
Responda
  • True
  • False

Questão 30

Questão
Moore’s law: “The interconnections on the integrated circuit are much more reliable than solder connections. With less circuitry on each chip, there are fewer interchip connections”
Responda
  • True
  • False

Questão 31

Questão
When Intel was developed its 4004, it is the first chip to contain all of the components of a CPU on a single chip, later known as Microprocessor
Responda
  • 1973
  • 1971
  • 1972
  • 1974
  • 1970

Questão 32

Questão
Processor can simultaneously work on multiple instructions. How this technique called?
Responda
  • Branch prediction
  • Pipelining
  • Data flow analysis
  • Speculative execution
  • None of the above

Questão 33

Questão
The processor looks ahead in the instruction code fetched from memory and predicts which branches, or groups of instructions, are likely to be processed next
Responda
  • Branch prediction
  • Pipelining
  • Data flow analysis
  • Speculative execution
  • None of the above

Questão 34

Questão
The processor analyzes which instructions are dependent on each other’s results, or data, to create an optimized schedule of instructions
Responda
  • Branch prediction
  • Pipelining
  • Data flow analysis
  • Speculative execution
  • None of the above

Questão 35

Questão
This enables the processor to keep its execution engines as busy as possible by executing instructions that are likely to be needed
Responda
  • Branch prediction
  • Pipelining
  • Data flow analysis
  • None of the above
  • Speculative execution

Questão 36

Questão
The “natural” unit of organization of memory
Responda
  • Word
  • Addressable units
  • Unit of transfer
  • Sequential access
  • Direct access

Questão 37

Questão
For main memory, this is the number of bits read out of or written into memory at a time
Responda
  • Word
  • Addressable units
  • Unit of transfer
  • Sequential access
  • Direct access

Questão 38

Questão
Memory is organized into units of data, called records; access must be made in a specific linear sequence
Responda
  • Word
  • Addressable units
  • Unit of transfer
  • Sequential access
  • Direct access

Questão 39

Questão
For random-access memory, this is the time it takes to perform a read or write operation
Responda
  • Access time
  • Memory cycle time
  • Transfer rate
  • Performance
  • All of the above

Questão 40

Questão
The L2 cache is slower and typically larger than the L1 cache, and the L3 cache is slower and typically larger than the L2 cache
Responda
  • True
  • False

Questão 41

Questão
The L2 cache is faster and typically larger than the L1 cache, and the L3 cache is slower and typically larger than the L2 cache
Responda
  • True
  • False

Questão 42

Questão
Additional hardware is used to ensure that all updates to main memory via cache are reflected in all caches
Responda
  • Bus watching with write through
  • Hardware transparency
  • Noncacheable memory
  • Software transparency
  • None of the above

Questão 43

Questão
Each cache controller monitors the address lines to detect write operations to memory by other bus masters
Responda
  • Bus watching with write through
  • Hardware transparency
  • Noncacheable memory
  • Software transparency
  • None of the above

Questão 44

Questão
Only a portion of main memory is shared by more than one processor, and this is designated as:
Responda
  • Bus watching with write through
  • Hardware transparency
  • Noncacheable memory
  • Software transparency
  • None of the above

Questão 45

Questão
Larger blocks increase the number of blocks that fit into a cache; because each block fetch overwrites older cache contents, a small number of blocks results in data being overwritten shortly after they are fetched
Responda
  • True
  • False

Questão 46

Questão
A state in which data requested for processing by a component or application is found in the cache memory
Responda
  • cache hit
  • cache miss
  • cache overwrites
  • cache set
  • cache access time

Questão 47

Questão
The basic element of a semiconductor memory is:
Responda
  • memory cell
  • cache memory
  • RAM
  • DRAM
  • None of the above

Questão 48

Questão
RAID stands for
Responda
  • Random Access Integral Disk
  • Redundant Access Integral Disk
  • Random Array Independent Disk
  • Redundant Array Independent Disk
  • Redundant Access Independent Disk

Questão 49

Questão
Data are recorded on and later retrieved from the disk via a conducting coil named the tail
Responda
  • True
  • False

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