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OS | Test 1

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Suicidal Operating Systems [Teachers: Teshebayeva Karagoz, Mishina Aigerim ; Final Exam + STATE EXAM] ▼ Quiz sobre OS | Test 1, criado por Good Guy Beket em 28-03-2019.
Good Guy Beket
Quiz por Good Guy Beket, atualizado more than 1 year ago
Good Guy Beket
Criado por Good Guy Beket mais de 5 anos atrás
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Resumo de Recurso

Questão 1

Questão
The figure below illustrates a partial program execution What is the address of the instruction that is being executed?
Image:
Screenshot 1 (binary/octet-stream)
Responda
  • 940
  • 941
  • 303
  • 302

Questão 2

Questão
What is NOT a main structural element of a computer system?
Responda
  • System bus
  • Main memory
  • Operating system
  • Processor

Questão 3

Questão
Which of the following element of a computer system controls the operation of the computer and performs its data processing functions?
Responda
  • Main Memory
  • I/O modules
  • Processor
  • System bus

Questão 4

Questão
This register specifies the location in memory for the next read or write
Responda
  • I/OAR
  • I/OBR
  • Memory Address Register
  • Memory Buffer Register

Questão 5

Questão
Complete the relationship concerning the memory systems: faster access time —
Responda
  • slower access speed
  • greater capacity
  • smaller cost per bit
  • greater cost per bit

Questão 6

Questão
When a processor attempts to read a byte or word of memory, it firstly checks the:
Responda
  • Cache
  • Disk
  • CD
  • Main memory

Questão 7

Questão
Complete the relationship concerning the memory systems: greater capacity —
Responda
  • faster access speed
  • greater cost per bit
  • smaller cost per bit
  • lower capacity

Questão 8

Questão
The processor contains a single data register, called:
Responda
  • PC
  • PSW
  • AC
  • IR

Questão 9

Questão
As one goes down the memory hierarchy the following occurs
Image:
Screenshot 2 (binary/octet-stream)
Responda
  • Decreasing capacity
  • Increasing frequency of access to the memory by the processor
  • Increasing cost per bit
  • Increasing access time

Questão 10

Questão
The figure below shows:
Image:
Screenshot 3 (binary/octet-stream)
Responda
  • Parent-child interrupt processing
  • Nested interrupt processing
  • Parallel interrupt processing
  • Sequential interrupt processing

Questão 11

Questão
The figure below shows:
Image:
Screenshot 4 (binary/octet-stream)
Responda
  • Nested interrupt processing
  • Parallel interrupt processing
  • Parent-child interrupt processing
  • Sequential interrupt processing

Questão 12

Questão
At the beginning of each instruction cycle, the processor fetches an instruction from the memory. The address of the instruction is held in:
Responda
  • PC
  • MBR
  • MAR
  • IR

Questão 13

Questão
Which of the following registers are used by the processor to exchange data with input/output module?
Responda
  • MAR and MBR
  • PC and IR
  • I/OAR and I/OBR
  • Program status word

Questão 14

Questão
Which of the following element of a computer system moves data between the computer and its external environment?
Responda
  • I/O modules
  • Processor
  • Main memory
  • System bus

Questão 15

Questão
Which register contains the address of the next instruction to be fetched?
Responda
  • Instruction register
  • Program counter
  • Execution register
  • Process counter

Questão 16

Questão
Which register contains the instruction most recently fetched?
Responda
  • Program counter
  • Process counter
  • Execution register
  • Instruction register

Questão 17

Questão
Choose the micro-instructions that reflect instruction execution stage shown in the figure below:
Image:
Screenshot 5 (binary/octet-stream)
Responda
  • IR → MAR 941 M → MBR 0002 MBR → AC 0002
  • PC → MAR 303 M → MBR 2941 MBR → IR 2941
  • PC → MAR 302 M → MBR 2941 MBR → IR 2941
  • IR → MAR 941 M → MBR 0005 MBR → AC 0005

Questão 18

Questão
Choose the micro-instructions that reflect instruction execution stage shown in the figure below:
Image:
Screenshot 6 (binary/octet-stream)
Responda
  • IR → MAR 941 M → MBR 0002 MBR → AC 0005
  • IR → MAR 941 M → MBR 0002 MBR → AC 0002
  • PC → MAR 302 M → MBR 2941 MBR → IR 2941
  • PC → MAR 301 M → I/OBR 5941 I/OBR → IR 5941

Questão 19

Questão
Choose the micro-instructions that reflect instruction execution stage shown in the figure below:
Image:
Screenshot 7 (binary/octet-stream)
Responda
  • PC → MAR 300 M → MBR 1940 MBR → IR 1940
  • M → MAR 300 M → MBR 1940 MBR → IR 1940
  • PC → MAR 300 M → MAR 1940 MBR → IR 1940
  • PC → MAR 301 M → MBR 1940 MBR → IR 1940

Questão 20

Questão
Choose the micro-instructions that reflect execution stage shown in the figure below:
Image:
Screenshot 8 (binary/octet-stream)
Responda
  • IR → MAR 1940 M → MBR 0003 MBR → AC 0003
  • PC → MAR 300 M → MBR 1940 MBR → IR 1940
  • IR → MAR 940 M → MBR 940 MBR → AC 0003
  • IR → MAR 940 M → MBR 0003 MBR → AC 0003

Questão 21

Questão
The figure below illustrates a partial program execution What is the memory location of the data that is addressed in the instruction?
Image:
Screenshot 9 (binary/octet-stream)
Responda
  • 940
  • 302
  • 941
  • 301

Questão 22

Questão
The figure below illustrates a partial program execution. What is the memory location of the data that is addressed in the instruction?
Image:
Screenshot 10 (binary/octet-stream)
Responda
  • 941
  • 301
  • 940
  • 302

Questão 23

Questão
The figure below illustrates a partial program execution Instruction in the IR will:
Image:
Screenshot 9 (binary/octet-stream)
Responda
  • Add 2 to AC from the memory
  • Store 3 to AC from the memory
  • Load 3 to AC from the memory
  • Add 3 to AC from the memory

Questão 24

Questão
When an I/O device completes an I/O operation, the device issues an interrupt signal to the processor and then:
Responda
  • The processor finishes the execution of the current instruction before responding to the interrupt
  • The processor loads the program counter with the entry location of the interrupt-handling routine
  • The processor saves information needed to resume the current program at the point if interrupt
  • The processor stops execution of the current instruction without finishing it and responds to the interrupt

Questão 25

Questão
The figure a) demonstrates the program timing diagram for:
Image:
Screenshot 11 (binary/octet-stream)
Responda
  • Interrupts; slow I/O wait
  • Interrupts; long I/O wait
  • Interrupts; short I/O wait
  • Interrupts; fast I/O wait
  • No interrupts

Questão 26

Questão
The smaller, more expensive, faster memory is:
Responda
  • Main memory
  • Register
  • Cache
  • Disk drive

Questão 27

Questão
If the contents of a block in the cache are altered, then it is needed to save it back to main memory before replacing it. This is called:
Responda
  • mapping function
  • replacement algorithm
  • write policy
  • locality of reference

Questão 28

Questão
Complete the relationship concerning the memory systems: greater capacity —
Responda
  • lower capacity
  • slower access speed
  • faster access speed
  • greater cost per bit

Questão 29

Questão
We have Ts = average (system) access time T1 = access time of M1 (e.g. cache) T2 = access time of M2 (e.g. main memory) T3 = access time of M3 (e.g. disk) H1 = hit ratio, fraction of time reference is found in M1 H2 = hit ratio, fraction of time reference is found in M2 The average time to access an item in case the item in cache is:
Responda
  • Ts = H1 × (T1 + T2)
  • Ts = H1 × T1 + H2 × T2
  • Ts = H1 × T1
  • Ts = H1 × T1 + (1 — H1) × (T1 + T2)

Questão 30

Questão
Which register contains condition codes set by the processor hardware as the result of operations?
Responda
  • Accumulator
  • Program counter
  • Stack pointer
  • Program status word

Questão 31

Questão
If the accessed word is not found in the faster memory, that is defined as a:
Responda
  • zero
  • miss
  • loss
  • ricochet

Questão 32

Questão
Which of the following element of a computer system stores data and programs?
Responda
  • Main memory
  • Processor
  • System bus
  • I/O modules

Questão 33

Questão
The processor is executing 'Load AC from memory' instruction. Choose the correct micro-instructions:
Responda
  • PC → MAR M → MBR MBR → IR IR → MAR M → MBR MBR → AC
  • PC → MAR M → MBR MBR → IR IR → MBR M → MAR MAR → AC
  • PC → MAR M → MBR MBR → AC IR → MAR M → MBR MBR → AC
  • PC → MBR M → MAR MAR → IR IR → MAR M → MBR MBR → AC

Questão 34

Questão
The processor determined that there is a pending interrupt and sent an acknowledgement signal to the device that issued the interrupt. Then, the processor:
Responda
  • Pause and remain idle until the I/O operation finishes
  • Saves the current state of the program being executed
  • Fetches new instruction from the user program and executes it
  • Loads new PC value based on interrupt

Questão 35

Questão
As one goes down the memory hierarchy the following occurs:
Image:
Screenshot 2 (binary/octet-stream)
Responda
  • Increasing capacity
  • Increasing cost per bit
  • Increasing frequency of access ot the memory by the processor
  • Decreasing access time

Questão 36

Questão
When the time required for the I/O operation is less than the time to complete the execution of instructions between write operations in the user program, it is:
Responda
  • Fast I/O wait
  • Short I/O wait
  • Slow I/O wait
  • Long I/O wait

Questão 37

Questão
We have Ts = average (system) access time T1 = access time of M1 (e.g. cache) T2 = access time of M2 (e.g. main memory) T3 = access time of M3 (e.g. disk) H1 = hit ratio, fraction of time reference is found in M1 H2 = hit ratio, fraction of time reference is found in M2 The average time to access an item in case the item in cache is:
Responda
  • Ts = H1 × T1 + H2 × T2 + (1 — H2) × T3
  • Ts = H1 × H1 + (1 — H1) × (H2 × (T1 + T2) + (1 — H2) × (T1 + T2 + T3))
  • Ts = H1 × H1 + (1 — H1) × (H2 × (T2 + T3)
  • Ts = H1 × H1 + (1 — H1) × (H1 × T1 + H2 × (T1+T2) + (1 — H2) × (T2 + T3))

Questão 38

Questão
The type of memory is nonvolatile:
Responda
  • Secondary memory
  • Cache
  • Main memory
  • Register

Questão 39

Questão
Which of the following provides for communication among elements of a computer system?
Responda
  • I/O modules
  • Processor
  • Main memory
  • System bus

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