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God Philosophy Quiz on CSA Last p1, created by хомяк убийца on 30/03/2019.
хомяк убийца
Quiz by хомяк убийца, updated more than 1 year ago
хомяк убийца
Created by хомяк убийца over 5 years ago
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Question 1

Question
The main computer that stores the files that can be sent to computers that are networked together is...?:
Answer
  • Clip art
  • Mother board
  • Peripheral
  • File server

Question 2

Question
Addressing mode used in instruction: add r1, r2, r3 is?
Answer
  • Register
  • Indirect
  • Base
  • Immediate

Question 3

Question
In generic microprocessor instruction time is…?
Answer
  • Exactly same as machine cycle time
  • Shorter than machine cycle time
  • Larger than machine cycle time
  • Ten times machine cycle time

Question 4

Question
Hardware devices that are not part of the main computer system and are often added later to the system?
Answer
  • Peripheral
  • Clip art
  • Highlight
  • Execute

Question 5

Question
Using a(n) _____ protocol, the sender and the receiver are synchronized by a signal called a clock
Answer
  • synchronous
  • asynchronous
  • analogue
  • block

Question 6

Question
The bandwidth of a(n) _____ signal is usually measured in bits per second.
Answer
  • video
  • digital
  • satellite
  • analog

Question 7

Question
A communications _____ is a physical path or frequency for a signal transmission.
Answer
  • band
  • channel
  • protocol
  • bridge

Question 8

Question
Which of the following terms represents the transmission capacity of a communications channel?
Answer
  • Indexing
  • Frequency
  • Bandwidth
  • Resolution

Question 9

Question
How many parts of Memory Hierarchy?
Answer
  • 5
  • 4
  • 2
  • 3

Question 10

Question
In Memory Hierarchy, at the Outboard storage which of the following are included:
Answer
  • Cache
  • Main memory
  • Magnetic tape
  • Magnetic disk

Question 11

Question
In Memory Hierarchy, at the Off-line storage which of the following are included:
Answer
  • Cache
  • Magnetic disk
  • Magnetic tape
  • Main memory

Question 12

Question
In Memory Hierarchy, at the Inboard memory which of the following are included:
Answer
  • Main memory
  • Magnetic disk
  • Magnetic tape
  • Optical disk

Question 13

Question
Cache Design has these properties?
Answer
  • Size, block size, mapping function, replacement algorithm, write policy
  • Size, search function, write function, read policy, vector algorithm
  • Size, mapping algorithm, vector function, write policy, replacement function
  • Size, blocking algorithm, search function, replacement vector, read policy

Question 14

Question
Three techniques are possible for I/O operations:
Answer
  • Programmed I/O, Interrupt-driven I/O, Direct memory access(DMA)
  • Object-oriented I/O, Design I/O, Usable I/O
  • Machine I/O, Architecture I/O, Hardware I/O
  • Control I/O, Status I/O, Transfer I/O

Question 15

Question
How many principles has Deadlock?
Answer
  • 3
  • 5
  • 2
  • 6

Question 16

Question
Which of the following principles has Deadlock?
Answer
  • Prevention, Avoidance, Detection
  • Execution, Association, Starvation
  • Exclusion, Avoidance, Starvation
  • Starvation, Detection, Exclusion

Question 17

Question
Much of the work in security and protection as it relates to operating systems can be roughly grouped into four categories?
Answer
  • Availability, confidentiality, data integrity, authenticity
  • Safety, accountability, reliability, density
  • Usability, integrity, confidentiality, reliability
  • Flexibility, availability, accountability, authenticity

Question 18

Question
The central themes of operating system design are all concerned with the management of processes and threads?
Answer
  • Multiprogramming, multiprocessing, distributed processing
  • Multitasking, multiprogramming, multithreading
  • Multiprocessing, uniprocessing, multitasking
  • Multithreading, distributed processing, uniprocessing

Question 19

Question
Can you solve the Dining Philosophers’ Problem using monitors?
Answer
  • yes
  • no

Question 20

Question
Assembly line operation is also called as?
Answer
  • Superscalar operation
  • pipelining process
  • Von-Neumann cycle
  • None of the mentioned

Question 21

Question
The CISC stands for?
Answer
  • Computer Instruction Set Compliment
  • Complete Instruction Set Compliment
  • Computer Indexed Set Components
  • Complex Instruction Set Computer

Question 22

Question
The secondary effect that results from instruction scheduling in large code segments is called ____?
Answer
  • Aggressive instruction
  • Correlating predictors
  • Register predictors
  • Register pressure

Question 23

Question
How many instructions can be implemented in MIPS?
Answer
  • 2 clock cycles
  • 3 clock cycles
  • 4 clock cycles
  • 5 clock cycles

Question 24

Question
What do you call the given statement as: “The number successful accesses to memory stated as a fraction.”
Answer
  • Hit rate
  • Miss rate
  • Success rate
  • Access rate5 clock cycles

Question 25

Question
Of the following, identify the memory usually written by the manufacturer.
Answer
  • RAM
  • DRAM
  • ROM
  • Cache memory

Question 26

Question
The Sun micro systems processors usually follow _____ architecture
Answer
  • CISC
  • ISA
  • ULTRA SPARC
  • RISC

Question 27

Question
The iconic feature of the RISC machine among the following are
Answer
  • Reduced number of addressing modes
  • Increased memory size
  • Having a branch delay slot
  • All of the above

Question 28

Question
Pipe-lining is a unique feature of _
Answer
  • RISC
  • СISC
  • IANA
  • ISA

Question 29

Question
Performance of a machine is determined by:
Answer
  • Instruction count, Clock cycle time, Clock cycles per instruction
  • Instruction count, Clock cycle time, Correlating predictors
  • Clock cycle time, Correlating predictors, Aggressive instruction
  • Clock cycle time, Clock cycles per instruction, Correlating predictors

Question 30

Question
What do you call the given statement as for type of memory?: “High density, low power, cheap, slow, need to be “refreshed” regularly”
Answer
  • DRAM
  • SRAM
  • CISC
  • RAM
  • ROM

Question 31

Question
Definition of Block:
Answer
  • minimum unit that is present or not present
  • location of block in memory
  • percentage of time item not found in upper level
  • memory closer to processor
  • time to access upper level

Question 32

Question
Definition of Block address:
Answer
  • minimum unit that is present or not present
  • location of block in memory
  • percentage of time item not found in upper level
  • memory closer to processor
  • time to access upper level

Question 33

Question
What is the total number of writes?
Image:
Набросок (1) (binary/octet-stream)
Answer
  • 196
  • 784
  • 512
  • 1024

Question 34

Question
What is the total number of writes that miss in the cache?
Image:
Набросок (1) (binary/octet-stream)
Answer
  • 588
  • 196
  • 25%
  • 12,5%

Question 35

Question
What is the total number of writes that hit in the cache?
Image:
Набросок (1) (binary/octet-stream)
Answer
  • 588
  • 784
  • 12,5%

Question 36

Question
Suppose that we want to enhance the processor used for Web serving. The new processor is 10 times faster on computation in the Web serving application than the original processor. Assuming that the original processor is busy with computation 40% of the time and is waiting for I/O 60% of the time, what is the overall speedup gained by incorporating the enhancement?
Answer
  • ≈ 1.86
  • ≈ 1.96
  • ≈ 1.56
  • 1.30

Question 37

Question
Suppose that we want to enhance the processor used for Web serving. The new processor is 2 times faster on computation in the Web serving application than the original processor. Assuming that the original processor is busy with computation 40% of the time and is waiting for I/O 60% of the time, what is the overall speedup gained by incorporating the enhancement?
Answer
  • ≈ 1.25
  • ≈ 1.96
  • ≈ 1.56
  • 1.30

Question 38

Question
Suppose that we want to enhance the processor used for Web serving. The new processor is 5 times faster on computation in the Web serving application than the original processor. Assuming that the original processor is busy with computation 50% of the time and is waiting for I/O 50% of the time, what is the overall speedup gained by incorporating the enhancement?
Answer
  • ≈ 1.86
  • ≈ 1.96
  • ≈ 1,67
  • 1.30

Question 39

Question
Suppose that we want to enhance the processor used for Web serving. The new processor is 2 times faster on computation in the Web serving application than the original processor. Assuming that the original processor is busy with computation 30% of the time and is waiting for I/O 70% of the time, what is the overall speedup gained by incorporating the enhancement?
Answer
  • ≈ 1.86
  • ≈ 1.18
  • ≈ 1.56

Question 40

Question
What is a RISC?
Answer
  • Reduced Instruction Set Computer
  • Rational Interruptible Security Computer
  • Research Interconnect Several Computer

Question 41

Question
When single-processor performance improvement has dropped?
Answer
  • 2003
  • 2004
  • 2002

Question 42

Question
How much in percentage single-processor performance improvement has dropped to less than?
Answer
  • 22
  • 11
  • 33

Question 43

Question
What is the RLP?
Answer
  • Research Level Parallelism
  • Random Level Parallelism
  • Request Level Parallelism

Question 44

Question
How many classes of computers classified?
Answer
  • 7
  • 3
  • 5

Question 45

Question
Which distance of price has Clusters/warehouse-scale computers?
Answer
  • 100 000 - 200 000 000 $
  • 5 000 – 10 000 000 $
  • 100 – 100 000 $

Question 46

Question
What is the PMD in computer classes?
Answer
  • Percentage map device
  • Powerful markup distance
  • Peak maze development
  • Personal mobile device

Question 47

Question
The Application of Brokerage operations how many cost of downtime per hour?
Answer
  • 8 870 000 $
  • 6 450 000 $
  • 7 550 000 $

Question 48

Question
What is the Vector Architectures and Graphic Processor Units (GPUs) -
Answer
  • Exploit data-level parallelism by applying a single instruction to a collection of data in parallel.
  • Exploits data-level parallelism at modest levels with compiler help using ideas like pipelining and at medium levels using ideas like speculative execution.
  • Exploits parallelism among largely decoupled tasks specified by the programmer or operating system.

Question 49

Question
What is the Thread Level Parallelism -
Answer
  • Exploits either data-level parallelism or task-level parallelism in a tightly coupled hardware model that allows for interaction among parallel threads.
  • Exploits parallelism among largely decoupled tasks specified by the programmer or operating system.
  • Exploit data-level parallelism by applying a single instruction to a collection of data in parallel.

Question 50

Question
What is the Request Level Parallelism:
Answer
  • Exploits either data-level parallelism or task-level parallelism in a tightly coupled hardware model that allows for interaction among parallel threads.
  • Exploit data-level parallelism by applying a single instruction to a collection of data in parallel.
  • Exploits parallelism among largely decoupled tasks specified by the programmer or operating system.

Question 51

Question
What is the Instruction Level Parallelism:
Answer
  • Exploits data-level parallelism at modest levels with compiler help using ideas like pipelining and at medium levels using ideas like speculative execution.
  • Exploits parallelism among largely decoupled tasks specified by the programmer or operating system.
  • Exploit data-level parallelism by applying a single instruction to a collection of data in parallel.

Question 52

Question
What is the MISD one of the categories of computers?
Answer
  • Multiple Instructions Streams, Single Data Stream
  • Multiple Instruction Streams, Multiple Data Streams
  • Multiple Instruction Streams, Set Data Stream

Question 53

Question
How many elements in Trends of Technology?
Answer
  • 3
  • 4
  • 5

Question 54

Question
How many elements of the Instruction Set Architecture (ISA):
Answer
  • 5
  • 6
  • 7

Question 55

Question
What is a ARF:
Answer
  • Architectural Register File
  • Architecture Relocation File
  • Architecture Reload File
  • Architectural Read File

Question 56

Question
What is a ROB?
Answer
  • Reorder Buffer
  • Read Only Buffer
  • Reload Buffer
  • Recall Buffer

Question 57

Question
What is a FSB?
Answer
  • Finished Store Buffer
  • Finished Stack Buffer
  • Finished Stall Buffer
  • Finished Star Buffer

Question 58

Question
What is a PRF?
Answer
  • Physical Register File
  • Pending Register File
  • Pipeline Register File
  • Pure Register File

Question 59

Question
What is a SB?
Answer
  • Scoreboard
  • Scorebased
  • Scaleboard
  • Scalebit

Question 60

Question
How many stages used in Superscalar (Pipeline)?
Answer
  • 5
  • 4
  • 6

Question 61

Question
What is about Superscalar means “F-D-X-M-W”?
Answer
  • Fetch, Decode, Execute, Memory, Writeback
  • Fetch, Decode, Instruct, Map, Write
  • Fetch, Decode, Excite, Memory, Write
  • Fetch, Decode, Except, Map, Writeback

Question 62

Question
Speculating on Exceptions “Prediction mechanism” is -
Answer
  • Exceptions are rare, so simply predicting no exceptions is very accurate
  • Exceptions detected at end of instruction execution pipeline, special hardware for various exception types
  • Only write architectural state at commit point, so can throw away partially executed instructions after exception
  • none

Question 63

Question
Speculating on Exceptions “Check prediction mechanism” is -
Answer
  • Exceptions detected at end of instruction execution pipeline, special hardware for various exception types
  • Exceptions are rare, so simply predicting no exceptions is very accurate
  • The way in which an object is accessed by a subject
  • none

Question 64

Question
Speculating on Exceptions “Recovery mechanism” is -
Answer
  • Only write architectural state at commit point, so can throw away partially executed instructions after exception
  • Exceptions are rare, so simply predicting no exceptions is very accurate
  • An entity capable of accessing objects
  • none

Question 65

Question
What is a RT?
Answer
  • Rename Table
  • Recall Table
  • Relocate Table
  • Remove Table

Question 66

Question
What is a FL?
Answer
  • Free List
  • Free Last
  • Free Leg
  • Free Launch

Question 67

Question
What is an IQ?
Answer
  • Issue Queue
  • Internal Queue
  • Interrupt Queue
  • Instruction Queue

Question 68

Question
At VLIW “Superscalar Control Logic Scaling” which parameters are used?
Answer
  • Width and Lifetime
  • Width and Height
  • Time and Cycle
  • Length and Addition

Question 69

Question
Out-of-Order Control Complexity MIPS R10000 which element is in Control Logic?
Answer
  • Register name
  • Instruction cache
  • Data tags
  • Data cache
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