CMOS Logic Gate

CMOS Logic Circuit consists of two networks, one Pull Down Network (PDN) and, one Pull Up Network (PUN). PDN are constructed of [blank_start]nMOS[blank_end] while PUN of [blank_start]pMOS[blank_end]. [blank_start]PDN[blank_end] will conduct for all input combinations that require a low output and will pull output to ground while [blank_start]PUN[blank_end] is OFF.

Which logic gate is shown in the picture

Which logic gate is shown in the picture