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hoffa HOFFMAN
Quiz by hoffa HOFFMAN, updated more than 1 year ago
hoffa HOFFMAN
Created by hoffa HOFFMAN almost 5 years ago
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Question 1

Question
1. What is not a main structural element of a computer system?
Answer
  • ● Operating system
  • ● System Bus
  • ● I/O Modules
  • ● Main Memory
  • ● Processor

Question 2

Question
2. Which of the following registers are used by the processor to exchange data with memory?
Answer
  • ● I/OAR and I/OBR
  • ● Program status word
  • ● PC and IR
  • ● MAR and MBR

Question 3

Question
3. Which of the following registers are used by the processor to exchange data with input/output module?
Answer
  • ● I/OAR and I/OBR
  • ● Program status word
  • ● PC and IR
  • ● MAR and MBR

Question 4

Question
4. Which of the following element of a computer system controls the operation of the computer and performs its data processing functions?
Answer
  • ● Processor
  • ● I/O modules
  • ● Main memory
  • ● System bus

Question 5

Question
5. Which of the following element of a computer system stores data and programs?
Answer
  • ● I/O modules
  • ● Processor
  • ● System bus
  • ● Main memory

Question 6

Question
6. Which of the following provides for communication among elements of a computer system?
Answer
  • ● I/O modules
  • ● Processor
  • ● System bus
  • ● Main memory

Question 7

Question
7. Which of the following element of a computer system moves data between the computer and its external environment?
Answer
  • ● I/O modules
  • ● System bus
  • ● Processor
  • ● Main memory

Question 8

Question
8. The processor contains a single data register, called
Answer
  • ● AC
  • ● IR
  • ● PC
  • ● PSW

Question 9

Question
9. This register specifies a particular input/output device
Answer
  • ● I/OBR
  • ● Memory buffer register
  • ● I/OAR
  • ● Memory address register

Question 10

Question
10. This register is used for the exchange of data between an I/O module and the processor
Answer
  • ● I/OBR
  • ● Memory buffer register
  • ● I/OAR
  • ● Memory address register

Question 11

Question
11. This register contains the data to be written into memory or which receives the data read from memory
Answer
  • ● I/OBR
  • ● memory address register
  • ● memory buffer register
  • ● I/OAR

Question 12

Question
12. This register specifies the location in memory for the next read or write
Answer
  • ● I/OBR
  • ● Memory buffer register
  • ● I/OAR
  • ● Memory address register

Question 13

Question
13. Index register, segment register, and stack register are example of:
Answer
  • ● Address register
  • ● Memory register
  • Memory buffer register
  • Memory quality register

Question 14

Question
14. Which register contains the address of the next instruction to be fetched?
Answer
  • ● process counter
  • ● program counter
  • ● execution register
  • ● instruction register

Question 15

Question
15. Which register contains the instruction most recently fetched?
Answer
  • ● process counter
  • ● program counter
  • ● execution register
  • ● instruction register

Question 16

Question
16. Which register contains condition codes set by the processor hardware as the result of operations?
Answer
  • ● Stack pointer
  • ● Program status word
  • ● Accumulator
  • ● Program counter

Question 17

Question
17. The figure 1.4. 1. What is the address of the instruction that is being executed?
Image:
17a (binary/octet-stream)
Answer
  • 301
  • ● 941
  • ● 302
  • ● 940

Question 18

Question
17.2. What is the address of the instruction that is being executed?
Image:
17b (binary/octet-stream)
Answer
  • 301
  • ● 941
  • ● 302
  • ● 940

Question 19

Question
17.3. What is the address of the instruction that is being executed?
Image:
17c (binary/octet-stream)
Answer
  • ● 301
  • ● 941
  • ● 302
  • ● 940

Question 20

Question
17.4. What is the address of the instruction that will be executed next?
Image:
17d (binary/octet-stream)
Answer
  • 301
  • ● 941
  • ● 302
  • ● 940

Question 21

Question
17.5. Instruction in the IR will:
Image:
17e (binary/octet-stream)
Answer
  • Load 3 to AC from the memory
  • ● Add 2 to AC from the memory
  • ● Store 3 to AC from the memory
  • ● Add 3 to AC from the memory

Question 22

Question
17.6. Instruction in the IR will:
Image:
17f (binary/octet-stream)
Answer
  • ● Load 3 to AC from the memory
  • ● Add 2 to AC from the memory
  • ● Store 3 to AC from the memory
  • ● Add 3 to AC from the memory

Question 23

Question
17.7. Instruction in the IR will:
Image:
17g (binary/octet-stream)
Answer
  • ● Store content of AC to the memory
  • ● Add 3 to the memory location from AC
  • ● Store 5 to AC from the memory
  • ● Add 2 to the memory location from AC

Question 24

Question
17.8. What is the memory location of the data that is addressed in the instruction?
Image:
17h (binary/octet-stream)
Answer
  • ● 301
  • ● 941
  • ● 302
  • ● 940

Question 25

Question
17.9. What is the memory location of the data that is addressed in the instruction?
Image:
17k (binary/octet-stream)
Answer
  • 301
  • ● 941
  • ● 302
  • ● 940

Question 26

Question
17.10. What is the memory location of the data that is addressed in the instruction?
Image:
17l (binary/octet-stream)
Answer
  • ● 301
  • ● 941
  • ● 302
  • ● 940

Question 27

Question
18. The fetched instruction is loaded into the
Answer
  • ● PC
  • ● Memory
  • ● Accumulator
  • ● IR

Question 28

Question
19. At the beginning of each instruction cycle, the processor fetches an instruction from the memory. The address of the instruction is held in
Answer
  • ● PC
  • ● MAR
  • ● MBR
  • ● IR

Question 29

Question
20. The processor is executing ‘Load AC from memory’ instruction. Choose the correct micro-instructions:
Answer
  • ● PC -> MAR M -> MBR MBR -> IR IR -> MBR M -> MAR MAR -> AC
  • ● PC -> MAR M -> MBR MBR -> IR IR -> MAR M -> MBR MBR -> AC
  • ● PC -> MBR M -> MAR MAR -> IR IR -> MAR M -> MBR MBR -> AC
  • ● PC -> MAR M -> MBR MBR -> AC IR -> MAR M -> MBR MBR -> AC

Question 30

Question
21.1 Choose the micro-instructions that reflect instruction execution stage shown in the figure below: (четыре вопроса в одном)четыре вопроса в одном))
Image:
1 (binary/octet-stream)
Answer
  • ● PC -> MAR 303 M -> MBR 2941 MBR -> IR 2941
  • ● IR -> MAR 2941 AC -> MBR 0005 MBR -> M 0005
  • ● IR -> MAR 941 AC -> MBR 0005 MBR -> M 0005
  • ● IR -> MAR 303 M -> MBR 0005 MBR -> M 0005

Question 31

Question
21.2 Choose true version?
Image:
2 (binary/octet-stream)
Answer
  • ● IR -> MAR 941 M -> MBR 0002 MBR ->AC 0005
  • ● PC -> MAR 302 M -> MBR 2941 MBR -> IR 2941
  • ● IR -> MAR 941 M -> MBR 0002 MBR -> AC 0002
  • ● PC -> MAR 301 M -> I/OBR 5941 I/OBR 5941

Question 32

Question
21.3 Choose true version?
Image:
3 (binary/octet-stream)
Answer
  • PC -> MAR 301 M -> MBR 6941 MBR -> IR 5941
  • ● IR -> MAR 941 AC -> MBR 0003 MBR -> M 0003
  • ● IR -> MAR 941 M -> MBR 0002 MBR -> AC 0002
  • ● PC -> MAR 301 M -> MBR 5941 MBR -> IR 5941

Question 33

Question
Choose true version?
Image:
4 (binary/octet-stream)
Answer
  • ● PC -> MAR 300 M -> MAR 1940 MBR -> IR 1940
  • ● PC -> MAR 300 M -> MBR 1940 MBR -> IR 1940
  • ● M -> MAR 300 M -> MBR 1940 MBR -> IR 1940
  • ● PC -> MAR 301 M -> MBR 1940 MBR -> IR 1940

Question 34

Question
22. When an I/O device completes an I/O operation, the device issues an interrupt signal to the processor and then:
Answer
  • ● The processor finishes execution of the current instruction before responding to the interrupt
  • ● The processor saves information needed to resume the current program at the point if interrupt
  • ● The processor loads the program counter with the entry location of the interrupt-handling routine
  • ● The processor stops execution of the current instruction without finishing it and responds to the interrupt

Question 35

Question
23. When the time required for the I/O operation is less that the time to complete the execution of instructions between write operations in the user program, it is:
Answer
  • ● Short I/O wait
  • ● Long I/O wait
  • ● Slow I/O wait
  • ● Fast I/O wait

Question 36

Question
24. When the time required for the I/O operation will take much more time than executing a sequence of user instructions, it is:
Answer
  • ● Short I/O wait
  • ● Fast I/O wait
  • ● Long I/O wait
  • ● Slow I/O wait

Question 37

Question
25. Most I/O devices are:
Answer
  • ● much slower than the processor
  • ● much processor than the slower
  • both

Question 38

Question
26. If there no interrupts, after each write operation, the processor must:?????
Answer
  • ● Pause and remain idle until the I/O operation finishes
  • ● Save the PSW and PC onto control stack
  • ● Finish execution of current instruction
  • ● Load new PC value

Question 39

Question
27. The processor determined that there is a pending interrupt and sent an acknowledgement signal to the device that issued the interrupt. Then, the processor:
Answer
  • The processor tests for a pending interrupt request, determines that there is one, and sends an acknowledgment signal to the device that issued the interrupt.The acknowledgment allows the device to remove its interrupt signal
  • жай гана ана сурактты зубри и все) Удачи

Question 40

Question
28. The figure 1.5, 1.8, 1.9, 1.12, 1.13, 1.14, 1.19: (четыре вопроса в одном)м)ного вопросов в одном)) 1. The following figure demonstrates:
Image:
5 (binary/octet-stream)
Answer
  • Interrupts; fast I/O wait
  • ● Interrupts; short I/O wait
  • ● Interrupts; long I/O wait
  • ● No interrupts
  • ● Interrupts; slow I/O wait

Question 41

Question
28,2. The following figure demonstrates:
Image:
6 (binary/octet-stream)
Answer
  • Interrupts; fast I/O wait
  • ● Interrupts; short I/O wait
  • ● Interrupts; long I/O wait
  • ● No interrupts
  • ● Interrupts; slow I/O wait

Question 42

Question
28,3. The following figure demonstrates:
Image:
7 (binary/octet-stream)
Answer
  • Interrupts; fast I/O wait
  • ● Interrupts; short I/O wait
  • ● Interrupts; long I/O wait
  • ● No interrupts
  • ● Interrupts; slow I/O wait

Question 43

Question
28,4. The figure a) demonstrates the program timing diagram for:
Image:
8 (binary/octet-stream)
Answer
  • Interrupts; fast I/O wait
  • ● Interrupts; short I/O wait
  • ● Interrupts; long I/O wait
  • ● No interrupts
  • ● Interrupts; slow I/O wait

Question 44

Question
28,5. The figure b) demonstrates the program timing diagram for
Image:
9 (binary/octet-stream)
Answer
  • ● Interrupts; fast I/O wait
  • ● Interrupts; short I/O wait
  • ● Interrupts; long I/O wait
  • ● No interrupts
  • ● Interrupts; slow I/O wait

Question 45

Question
28,6. The figure a) demonstrates the program timing diagram for:
Image:
10 (binary/octet-stream)
Answer
  • ● Interrupts; fast I/O wait
  • ● Interrupts; short I/O wait
  • ● Interrupts; long I/O wait
  • ● No interrupts
  • ● Interrupts; slow I/O wait

Question 46

Question
28,7. The figure b) demonstrates the program timing diagram for
Image:
11 (binary/octet-stream)
Answer
  • Interrupts; fast I/O wait
  • ● Interrupts; short I/O wait
  • ● Interrupts; long I/O wait
  • ● No interrupts
  • ● Interrupts; slow I/O wait

Question 47

Question
28,8. The figure below shows
Image:
12 (binary/octet-stream)
Answer
  • Parallel interrupt processing
  • ● Nested interrupt processing
  • ● Sequential interrupt processing
  • ● Parent-child interrupt processing

Question 48

Question
28,9. The figure below shows
Image:
13 (binary/octet-stream)
Answer
  • Parallel interrupt processing
  • ● Nested interrupt processing
  • ● Sequential interrupt processing
  • ● Parent-child interrupt processing

Question 49

Question
28,10. The figure below shows
Image:
14 (binary/octet-stream)
Answer
  • Parallel interrupt processing
  • ● Nested interrupt processing
  • ● Sequential interrupt processing
  • ● Time Sequence of Multiple Interrupts

Question 50

Question
28,11. As one goes down the memory hierarchy
Image:
15 (binary/octet-stream)
Answer
  • ● increasing frequency of access to the memory by the processor
  • ● increasing capacity
  • ● decreasing access time
  • ● increasing cost per bit

Question 51

Question
28,12. The given flowchart is an example of:
Image:
16 (binary/octet-stream)
Answer
  • ● Manual memory access
  • ● Programmed I/O
  • ● Interrupt-driven I/O
  • ● Direct memory access (DMA)

Question 52

Question
28,13. The given flowchart is an example of:
Image:
17 (binary/octet-stream)
Answer
  • ● Manual memory access
  • ● Programmed I/O
  • ● Interrupt-driven I/O
  • ● Direct memory access (DMA)

Question 53

Question
28,14. The given flowchart is an example of:
Image:
18 (binary/octet-stream)
Answer
  • ● Manual memory access
  • ● Programmed I/O
  • ● Interrupt-driven I/O
  • ● Direct memory access (DMA)

Question 54

Question
29. Complete the relationship concerning the memory systems: faster access time –
Answer
  • ● smaller cost per bit
  • ● faster access speed
  • ● greater cost per bit
  • ● lower capacity

Question 55

Question
30. Complete the relationship concerning the memory systems: greater capacity –
Answer
  • ● smaller cost per bit
  • ● faster access speed
  • ● greater cost per bit
  • ● lower capacity

Question 56

Question
31. Complete the relationship concerning the memory systems: greater capacity –
Answer
  • ● faster access speed
  • ● greater cost per bit
  • ● slower access time
  • ● lower capacity

Question 57

Question
33. The smaller, more expensive, faster memory is:
Answer
  • ● Register
  • ● Main memory
  • ● Cache
  • ● Disk drive

Question 58

Question
34. If the accessed word is found in the faster memory, that is defined as a:
Answer
  • ● evrika
  • ● hit
  • ● win
  • ● bingo

Question 59

Question
35. If the accessed word is not found in the faster memory, that is defined as a:
Answer
  • ● Loss
  • ● zero
  • ● miss
  • ● ricochet

Question 60

Question
36. This type of memory is nonvolatile:
Answer
  • ● Main memory
  • ● Cache
  • ● Secondary memory
  • ● Register
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