Frage 1
Frage
Associative Mapping
Antworten
-
• Each block mapped to any cache location
-
• Each memory block is mapped to exactly one block in the cache
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• Each block mapped to subset of cache locations
Frage 2
Antworten
-
• Each block mapped to any cache location
-
• Each memory block is mapped to exactly one block in the cache
-
• Each block mapped to subset of cache locations
Frage 3
Frage
Set-Associative Mapping
Antworten
-
• Each block mapped to any cache location
-
• Each memory block is mapped to exactly one block in the cache
-
• Each block mapped to subset of cache locations
Frage 4
Frage
• Structural hazards
Antworten
-
different instructions in different stages (or the same stage) conflicting for the same resource
-
an instruction cannot continue because it needs a value that has not yet been generated by an earlier instruction
-
fetch cannot continue because it does not know the outcome of an earlier branch – special case of a data hazard
Frage 5
Antworten
-
different instructions in different stages (or the same stage) conflicting for the same resource
-
an instruction cannot continue because it needs a value that has not yet been generated by an earlier instruction
-
fetch cannot continue because it does not know the outcome of an earlier branch – special case of a data hazard
Frage 6
Antworten
-
different instructions in different stages (or the same stage) conflicting for the same resource
-
an instruction cannot continue because it needs a value that has not yet been generated by an earlier instruction
-
fetch cannot continue because it does not know the outcome of an earlier branch – special case of a data hazard
Frage 7
Frage
• Compulsory misses
Antworten
-
The very first access to a block cannot be in the cache
-
Occurs if the cache cannot contain all the blocks needed during execution of a program
-
Occurs if the block placement strategy is not fully associative
Frage 8
Antworten
-
The very first access to a block cannot be in the cache
-
Occurs if the cache cannot contain all the blocks needed during execution of a program
-
Occurs if the block placement strategy is not fully associative
Frage 9
Antworten
-
The very first access to a block cannot be in the cache
-
Occurs if the cache cannot contain all the blocks needed during execution of a program
-
Occurs if the block placement strategy is not fully associative
Frage 10
Frage
4) Choose the feature(s) of first generation computer architecture
Frage 11
Frage
5) A common measure of performance for a processor is the rate at which instructions are executed, called
Antworten
-
• CPI
-
• Clock Rate
-
• MFLOPS
-
• MIPS
Frage 12
Frage
6) A technique used in advanced microprocessors where the microprocessor begins executing a first instruction before the second has been completed is called pipelining
Frage 13
Frage
7) Choose the features of third generation computer architecture
Frage 14
Frage
8) Choose advanced cache optimizations
Antworten
-
• Giving Reads Priority over Writes
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• Larger Cache Size
-
• Hardware Prefetching of Instructions and Data
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• Merging Write Buffer
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• Critical Word First and Early Restart
Frage 15
Frage
9) Choose basic cache optimizations
Antworten
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• Compiler-Controlled Prefetching
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• Nonblocking Caches
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• Small and Simple First-Level Caches
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• Multilevel Caches
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• Avoiding Address Translation during Cache Indexing
Frage 16
Frage
10) Choose data dependences
Antworten
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• Read-After-Read
-
• Read-After-Write
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• Write-After-Write
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• Write-After-Read
Frage 17
Frage
11) Choose hazard for the following definition: an instruction cannot continue because it needs a value that has not yet been generated by an earlier instruction
Antworten
-
• Data
-
• Structural
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• Control
Frage 18
Frage
12) Choose hazard for the following definition: different instructions in different stages (or the same stage) conflicting for the same resource
Antworten
-
o Structural
-
o Data
-
o Control
Frage 19
Frage
13) Choose hazard for the following definition: fetch cannot continue because it does not know the outcome of an earlier branch - special case of a data hazard
Antworten
-
o Control
-
o Structural
-
o Data
Frage 20
Frage
14) Choose the access method(s)
Antworten
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o Parallel Access
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o Indirect Access
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o Random Access
-
o Direct Access
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o Sequential Access
Frage 21
Frage
15) Choose the component of SSD for the following definition: High speed RAM memory components used for speed matching and to increased data throughput
Frage 22
Frage
16) Choose the component of SSD for the following definition: Individual NAND flash chips
Frage 23
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17) Choose the component of SSD for the following definition: Logic for error detection and correction
Frage 24
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18) Choose the component of SSD for the following definition: Logic that performs the selection function across the flash memory components
Frage 25
Frage
19) Choose the component of SSD for the following definition: provides SSD device level interfacing and firmware execution
Frage 26
Frage
20) Choose the components of SSD
Antworten
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o Controller
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o Addressing
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o Data buffer/cache
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o Data size
-
o Memory hierarchy
Frage 27
Frage
21) Choose the definition for capacity misses
Antworten
-
o Occurs if the cache cannot contain all the blocks needed during execution of a program
-
o The very first access to a block cannot be in the cache
-
o Occurs if the block placement strategy is not fully associative
Frage 28
Frage
22) Choose the definition for compulsory misses
Antworten
-
o Occurs if the cache cannot contain all the blocks needed during execution of a program
-
o Occurs if the block placement strategy is not fully associative
-
o The very first access to a block cannot be in the cache
Frage 29
Frage
23) Choose the definition for conflict misses
Antworten
-
o Occurs if the block placement strategy is not fully associative
-
o Occurs if the cache cannot contain all the blocks needed during execution of a program
-
o The very first access to a block cannot be in the cache
Frage 30
Frage
24) Choose the element(s) of cache design
Antworten
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o Tag
-
o Latency
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o AMAT
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o Mapping Function
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o Replacement Algorithm
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o Number of Caches
Frage 31
Frage
25) Choose the element(s) of cache design
Antworten
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o Tag
-
o AMAT
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o Latency
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o Cache Size
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o Line Size
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o Number of Caches
Frage 32
Frage
26) Choose the feature(s) of first generation computer architecture
Antworten
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o Magnetic core memory
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o Semiconductor memory
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o Machine code
-
o Assembly language
-
o Vacuum tubes
Frage 33
Frage
27) Choose the feature(s) of fourth generation computer architecture
Antworten
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o Object-Oriented programming
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o Wide spread use of data communications
-
o Smallest in size
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o Use of cache memory
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o Use of drum memory or magnetic core memory
Frage 34
Frage
28) Choose the feature(s) of second generation computer architecture
Frage 35
Frage
29) Choose the feature(s) of third generation computer architecture
Frage 36
Frage
30) Choose the key characteristics of computer memory systems
Antworten
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o Location
-
o Unit of Transfer
-
o Access Method
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o Stalling
-
o Hazards
Frage 37
Frage
31) Choose the key characteristics of computer memory systems
Antworten
-
o Capacity
-
o Performance
-
o Organization
-
o Instruction Fetch
-
o Instruction Decode
Frage 38
Frage
32) Choose the key characteristics of computer memory systems
Frage 39
Frage
33) Choose the performance factor
Frage 40
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34) Choose the performance factor(s)
Frage 41
Frage
36) Choose the physical characteristic(s) of disk systems
Frage 42
Frage
36) Choose the physical characteristic(s) of disk systems
Frage 43
Frage
37) Choose the right formula for AMAT
Antworten
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o AMAT \= Hit time + Miss rate + Miss penalty
-
o AMAT \= Hit time * Miss rate + Miss penalty
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o AMAT \= Hit time * Miss rate * Miss penalty
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o AMAT \= Hit time + Miss rate * Miss penalty
Frage 44
Frage
38) Choose the system attribute(s) by which the performance factors are influenced
Frage 45
Frage
39) Choose the type(s) of auxiliary memory
Antworten
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o Flash Memory
-
o Optical Disk
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o Hard Drive
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o SSD
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o RAM
Frage 46
Frage
40) Choose the years of the first generation computer architecture
Antworten
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o 1958-1964
-
o 1964-1974
-
o 1974-present
-
o 1945-1964
-
o 1945-1958
Frage 47
Frage
41) Choose the years of the second generation computer architecture
Antworten
-
o 1945-1958
-
o 1964-1974
-
o 1974-present
-
o 1945-1964
-
o 1958-1964
Frage 48
Frage
42) Choose two types of models for a computing machine
Frage 49
Frage
43) CPU Time \= I * CPI / R. Which parameter requires special profiling software?
Frage 50
Frage
44) Floating point performance is expressed as
Antworten
-
o CPI
-
o FLOPS
-
o MIPS
-
o MFLOPS
Frage 51
Frage
45) For random-access memory, the time it takes to perform a read or write operation is called
Antworten
-
o Clock Rate
-
o CPI
-
o Access Time
-
o Latency
Frage 52
Frage
Four bits make octal digit
Frage 53
Frage
47) Halting the flow of instructions until the required result is ready to be used is called
Antworten
-
o waiting
-
o delaying
-
o halting
-
o stalling
Frage 54
Frage
48) How a binary digit is called?
Antworten
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o byte
-
o digit
-
o kilobyte
-
o bit
Frage 55
Frage
49) How a memory unit accessed by contents is called?
Frage 56
Frage
50) How external nonvolatile memory is called?
Antworten
-
o Secondary memory
-
o Main memory
-
o Cache memory
-
o Virtual memory
Frage 57
Frage
51) How many access methods are there?
Frage 58
Frage
52) how many elements of cache design are there?
Frage 59
Frage
53) How many generations of computer architecture are there?
Frage 60
Frage
54) How many number systems are there?
Frage 61
Frage
55) How many performance factors are there
Frage 62
Frage
56) How many physical characteristics of disk systems are there?
Frage 63
Frage
57) How the stage in which the results of the operation are written to the destination register is called?
Antworten
-
o Instruction Fetch
-
o Write Back
-
o Instruction Decode
-
o Execution
-
o Memory read/write
Frage 64
Frage
58) IBM System/360 Model 91 was introduced in 1966
Frage 65
Frage
59) In 1976 Apple II computer model was released
Frage 66
Frage
60) In execution stage identification of the operation is performed
Frage 67
Frage
61) In LRU replacement algorithm, the block that is in the cache longest is replaced
Frage 68
Frage
62) In virtual memory, memory can be used efficiently because a section of program always loaded
Frage 69
Frage
63) In which cache memory mapping technique any block from main memory can be placed anywhere in the cache?
Frage 70
Frage
64) In which cache memory mapping technique any memory block is mapped to exactly one block in the cache?
Frage 71
Frage
65) In which cache memory mapping technique any memory block mapped to subset of cache locations?
Frage 72
Frage
66) Into how many parts a program (or algorithm) which can be parallelized can be split up?
Frage 73
Frage
67) Select cache optimizations to reduce miss penalty
Frage 74
Frage
68) Select cache optimizations to increase the Cache Bandwidth
Frage 75
Frage
69) Octal and hexadecimal numbers are hard on use and conversion
Frage 76
Frage
70) Physical address used by program, and which OS must translate into virtual address
Frage 77
Frage
Pipelining can only be implemented on hardware
Frage 78
Frage
Process of instruction execution is divided into two or more steps, called
Antworten
-
o pipelining
-
o pipe stages
-
o pipe segments
-
o instruction execution
-
o pipeline hazard
Frage 79
Frage
73) ROM is the place in a computer where the operating system, application programs, and data in current use are kept.
Frage 80
Frage
74) Choose the features of first generation computer architecture
Antworten
-
o Vacuum tubes
-
o Assembly language
-
o Magnetic core memory
-
o Semiconductor memory
-
o Machine code
Frage 81
Frage
75) How a memory unit accessed by contents is called?
Frage 82
Frage
76) Choose the access methods
Antworten
-
o Random Access
-
o Parallel Access
-
o Sequential Access
-
o Indirect Access
-
o Direct Access
Frage 83
Frage
77) Which type of memory accessed via the input/output channels?
Antworten
-
o Auxiliary Memory
-
o Secondary Memoory
-
o Main Memory
-
o Cache Memory
-
o Virtual Memory
Frage 84
Frage
78) Which type of memory stores frequently used data?
Antworten
-
o Cache Memory
-
o Auxiliary Memory
-
o Main Memory
-
o Virtual Memory
-
o Secondary Memory
Frage 85
Frage
79) Stage in which the instruction is fetched from memory and placed in the instruction register called
Antworten
-
o Instruction Fetch
-
o Instruction Decode
-
o Memory read/write
-
o Execution
-
o Write Back
Frage 86
Frage
80) Which stage is responsible for storing and loading values to and from memory?
Antworten
-
o Instruction Fetch
-
o Instruction Decode
-
o Execution
-
o Memory read/write
-
o Write Back
Frage 87
Frage
81) How the stage in which the results of the operation are written to the destination register is called?
Antworten
-
o Instruction Fetch
-
o Instruction Decode
-
o Execution
-
o Memory read/write
-
o Write Back
Frage 88
Frage
82) Select cache optimizations to reduce hit time (both basic and advanced)
Antworten
-
o Avoiding Address Translation during Cache Indexing
-
o Small and Simple First-Level Caches
-
o Way Prediction
-
o Compiler Optimizations
-
o Compiler-Controlled Prefetching
Frage 89
Frage
83) Select the correct interpretation(s) of Amdahl's Law
Antworten
-
o is used to compare computers' performance
-
o is used calculate the execution time of a program
-
o is used to find the maximum expected improvement
-
o it means that it is the algorithm that decides the speedup not the number of processors
Frage 90
Frage
84) SSD is over 10 times faster than the spinning disks in HDD
Frage 91
Frage
85) SSD stands for :
Antworten
-
• Solid State Drive
-
• Saved State Drive
-
• Solid Slash Drive
-
• Soska State Drive
Frage 92
Frage
86) SSDs are more susceptible to physical shock and vibration
Frage 93
Frage
87) SSDs are susceptible to mechanical wear :
Frage 94
Frage
88) Static RAM has a reduced power consumption, and a large storage capacity :
Frage 95
Frage
89) The "natural" unit of organization of memory is called block :
Frage 96
Frage
90) The advantage of virtual memory is that it takes less time to switch between applications because of additional memory :
Frage 97
Frage
91) The basic element of a semiconductor memory is the memory cell :
Frage 98
Frage
92) The execution time of a program clearly depends on the number of instructions :
Frage 99
Frage
he more clock rate of processor, the faster is processor :
Frage 100
Frage
94) The particular block is currently being stored is called tag :
Frage 101
Frage
95) The RAID scheme consists of 7 levels :
Frage 102
Frage
96) The rate at which data can be transferred into or out of a memory unit is called :
Antworten
-
• Transfer Rate
-
• Speed Rate
-
• Popularity Rate
Frage 103
Frage
97) The time interval is called a clock rate
Frage 104
Frage
98) There are three types of cache addresses :
Frage 105
Frage
99) There are two types of mapping functions :
Frage 106
Frage
100) Three bits make hexadecimal digit :
Frage 107
Frage
101) We can find needed block in associatively mapped cache by its block address :
Frage 108
Frage
102) What does CPI stand for:
Antworten
-
• Cycles Per Instruction
-
• Circles Per Instruction
-
• Cycles Per Intersection
-
• Curcuits Per Instruction
Frage 109
Frage
103) What does LRU stand for? :
Antworten
-
• Least Recently Used
-
• Least Rarely Used
-
• Least Recently Unified
-
• Less Recently Used
Frage 110
Frage
104) What does RAID stand for?:
Antworten
-
• Redundant Array of Independent Disks
-
• Reduced Array of Independent Disks
-
• Redundant Array of Independent Dots
-
• Restructered Array of Independent Disks
Frage 111
Frage
105) What is included into performance characteristic of computer memory systems? :
Antworten
-
Access time
-
Cycle Time
-
Transfer Rate
-
Speed rate
Frage 112
Frage
106) What is included into physical type characteristic of computer memory systems? :
Antworten
-
• Semiconductor
-
• Magnetic
-
• Laser
-
• Tapes
Frage 113
Frage
107) What is time elapsed to program execution? :
Antworten
-
• CPU Time + I/O waiting
-
• Other programs
-
• Cycle Time
-
• Access time
Frage 114
Frage
108) Which digits are used in octal number system? :
Frage 115
Frage
109) Which stage is responsible for storing and loading values to and from memory?
Antworten
-
• Memory read/write
-
• Write back
-
• Memory update
-
• Memory allocation
Frage 116
Frage
110) Which type of memory accessed via the input/output channels :
Antworten
-
• Auxiliary Memory
-
• Secondary Memory
-
• Virtual memory
-
• Cache memory
Frage 117
Frage
111) Which type of memory stores frequently used data :
Antworten
-
• Cache Memory
-
• Virtual Memory
-
• Secondary Memory
-
• Axuilary Memory
Frage 118
Frage
112) Word is the "natural" unit of organization of memory :
Frage 119
Frage
113) Halting the flow of instructions until the required result is ready to be used is called :
Antworten
-
• stalling
-
• hailing
-
• falling
-
• feeling
Frage 120
Frage
114) In virtual memory, memory can be used efficiently because a section of program always loaded :
Frage 121
Frage
115) Choose the key characteristics of computer memory systems
Antworten
-
Physical Type
-
Physical Characteristics
-
Access Method
-
Unit of Transfer
-
Performance
-
None of them